Commit 90f6452c authored by changzhu's avatar changzhu Committed by Alex Deucher
Browse files

drm/amdgpu: add invalidate semaphore limit for SRIOV and picasso in gmc9 



It may fail to load guest driver in round 2 or cause Xstart problem
when using invalidate semaphore for SRIOV or picasso. So it needs avoid
using invalidate semaphore for SRIOV and picasso.

Signed-off-by: default avatarchangzhu <Changfeng.Zhu@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 413fc385

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+24 −20
Original line number Diff line number Diff line
@@ -416,6 +416,24 @@ static uint32_t gmc_v9_0_get_invalidate_req(unsigned int vmid, 
	return req;

}



/**

 * gmc_v9_0_use_invalidate_semaphore - judge whether to use semaphore

 *

 * @adev: amdgpu_device pointer

 * @vmhub: vmhub type

 *

 */

static bool gmc_v9_0_use_invalidate_semaphore(struct amdgpu_device *adev,

				       uint32_t vmhub)

{

	return ((vmhub == AMDGPU_MMHUB_0 ||

		 vmhub == AMDGPU_MMHUB_1) &&

		(!amdgpu_sriov_vf(adev)) &&

		(!(adev->asic_type == CHIP_RAVEN &&

		   adev->rev_id < 0x8 &&

		   adev->pdev->device == 0x15d8)));

}



/*

 * GART

 * VMID 0 is the physical GPU addresses as used by the kernel.
@@ -435,6 +453,7 @@ static uint32_t gmc_v9_0_get_invalidate_req(unsigned int vmid, 
static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,

					uint32_t vmhub, uint32_t flush_type)

{

	bool use_semaphore = gmc_v9_0_use_invalidate_semaphore(adev, vmhub);

	const unsigned eng = 17;

	u32 j, tmp;

	struct amdgpu_vmhub *hub;
@@ -468,11 +487,7 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, 
	 */



	/* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */

	if ((vmhub == AMDGPU_MMHUB_0 ||

	     vmhub == AMDGPU_MMHUB_1) &&

	    (!(adev->asic_type == CHIP_RAVEN &&

	       adev->rev_id < 0x8 &&

	       adev->pdev->device == 0x15d8))) {

	if (use_semaphore) {

		for (j = 0; j < adev->usec_timeout; j++) {

			/* a read return value of 1 means semaphore acuqire */

			tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng);
@@ -502,11 +517,7 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, 
	}



	/* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */

	if ((vmhub == AMDGPU_MMHUB_0 ||

	     vmhub == AMDGPU_MMHUB_1) &&

	    (!(adev->asic_type == CHIP_RAVEN &&

	       adev->rev_id < 0x8 &&

	       adev->pdev->device == 0x15d8)))

	if (use_semaphore)

		/*

		 * add semaphore release after invalidation,

		 * write with 0 means semaphore release
@@ -524,6 +535,7 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, 
static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,

					    unsigned vmid, uint64_t pd_addr)

{

	bool use_semaphore = gmc_v9_0_use_invalidate_semaphore(ring->adev, ring->funcs->vmhub);

	struct amdgpu_device *adev = ring->adev;

	struct amdgpu_vmhub *hub = &adev->vmhub[ring->funcs->vmhub];

	uint32_t req = gmc_v9_0_get_invalidate_req(vmid, 0);
@@ -537,11 +549,7 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring, 
	 */



	/* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */

	if ((ring->funcs->vmhub == AMDGPU_MMHUB_0 ||

	     ring->funcs->vmhub == AMDGPU_MMHUB_1) &&

	    (!(adev->asic_type == CHIP_RAVEN &&

	       adev->rev_id < 0x8 &&

	       adev->pdev->device == 0x15d8)))

	if (use_semaphore)

		/* a read return value of 1 means semaphore acuqire */

		amdgpu_ring_emit_reg_wait(ring,

					  hub->vm_inv_eng0_sem + eng, 0x1, 0x1);
@@ -557,11 +565,7 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring, 
					    req, 1 << vmid);



	/* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */

	if ((ring->funcs->vmhub == AMDGPU_MMHUB_0 ||

	     ring->funcs->vmhub == AMDGPU_MMHUB_1) &&

	    (!(adev->asic_type == CHIP_RAVEN &&

	       adev->rev_id < 0x8 &&

	       adev->pdev->device == 0x15d8)))

	if (use_semaphore)

		/*

		 * add semaphore release after invalidation,

		 * write with 0 means semaphore release

CRA Git | Maintained and supported by SUSTech CRA and CCSE