Commit 90e2e96e authored by Thierry Reding's avatar Thierry Reding Committed by Ben Skeggs
Browse files

drm/nouveau/gr/gp10b: Use gp100_grctx and gp100_gr_zbc



gp10b doesn't have all the registers that gp102_gr_zbc wants to access,
which causes IBUS MMIO faults to occur. Avoid this by using the gp100
variants of grctx and gr_zbc.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 89b34254
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+1 −0
Original line number Diff line number Diff line
@@ -238,6 +238,7 @@ void gp100_gr_init_fecs_exceptions(struct gf100_gr *);
void gp100_gr_init_shader_exceptions(struct gf100_gr *, int, int);
void gp100_gr_zbc_clear_color(struct gf100_gr *, int);
void gp100_gr_zbc_clear_depth(struct gf100_gr *, int);
extern const struct gf100_gr_func_zbc gp100_gr_zbc;

void gp102_gr_init_swdx_pes_mask(struct gf100_gr *);
extern const struct gf100_gr_func_zbc gp102_gr_zbc;
+1 −1
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ gp100_gr_zbc_clear_depth(struct gf100_gr *gr, int zbc)
			  gr->zbc_depth[zbc].format << ((znum % 4) * 7));
}

static const struct gf100_gr_func_zbc
const struct gf100_gr_func_zbc
gp100_gr_zbc = {
	.clear_color = gp100_gr_zbc_clear_color,
	.clear_depth = gp100_gr_zbc_clear_depth,
+2 −2
Original line number Diff line number Diff line
@@ -60,8 +60,8 @@ gp10b_gr = {
	.gpc_nr = 1,
	.tpc_nr = 2,
	.ppc_nr = 1,
	.grctx = &gp102_grctx,
	.zbc = &gp102_gr_zbc,
	.grctx = &gp100_grctx,
	.zbc = &gp100_gr_zbc,
	.sclass = {
		{ -1, -1, FERMI_TWOD_A },
		{ -1, -1, KEPLER_INLINE_TO_MEMORY_B },