Commit 907a2b7e authored by Grygorii Strashko's avatar Grygorii Strashko Committed by Santosh Shilimkar
Browse files

soc: ti: add k3 platforms chipid module driver 



The Texas Instruments K3 Multicore SoC platforms have chipid module which
is represented by CTRLMMR_xxx_JTAGID register and contains information
about SoC id and revision.
 Bits:
  31-28 VARIANT Device variant
  27-12 PARTNO  Part number
  11-1  MFG     Indicates TI as manufacturer (0x17)
  1             Always 1

This patch adds corresponding driver to identify the TI K3 SoC family and
revision, and registers this information with the SoC bus. It is available
under /sys/devices/soc0/ for user space, and can be checked, where needed,
in Kernel using soc_device_match().

Identification is done by:
- checking MFG to be TI ID
 - retrieving Device variant (revision)
 - retrieving Part number and convert it to the family
 - retrieving machine from DT "/model"

Example J721E:
  # cat /sys/devices/soc0/{machine,family,revision}
  Texas Instruments K3 J721E SoC
  J721E
  SR1.0

Example AM65x:
  # cat /sys/devices/soc0/{machine,family,revision}
  Texas Instruments AM654 Base Board
  AM65X
  SR1.0

Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarGrygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: default avatarLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: default avatarTero Kristo <t-kristo@ti.com>
Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@oracle.com>
parent 232150cc

drivers/soc/ti/Kconfig

+10 −0
Original line number Diff line number Diff line
@@ -91,6 +91,16 @@ config TI_K3_RINGACC 
	  and a consumer. There is one RINGACC module per NAVSS on TI AM65x SoCs

	  If unsure, say N.



config TI_K3_SOCINFO

	bool

	depends on ARCH_K3 || COMPILE_TEST

	select SOC_BUS

	select MFD_SYSCON

	help

	  Include support for the SoC bus socinfo for the TI K3 Multicore SoC

	  platforms to provide information about the SoC family and

	  variant to user space.



endif # SOC_TI



config TI_SCI_INTA_MSI_DOMAIN

drivers/soc/ti/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -11,3 +11,4 @@ obj-$(CONFIG_WKUP_M3_IPC) += wkup_m3_ipc.o 
obj-$(CONFIG_TI_SCI_PM_DOMAINS)		+= ti_sci_pm_domains.o

obj-$(CONFIG_TI_SCI_INTA_MSI_DOMAIN)	+= ti_sci_inta_msi.o

obj-$(CONFIG_TI_K3_RINGACC)		+= k3-ringacc.o

obj-$(CONFIG_TI_K3_SOCINFO)		+= k3-socinfo.o

drivers/soc/ti/k3-socinfo.c

0 → 100644
+152 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * TI K3 SoC info driver

 *

 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com

 */



#include <linux/mfd/syscon.h>

#include <linux/of.h>

#include <linux/of_address.h>

#include <linux/regmap.h>

#include <linux/platform_device.h>

#include <linux/slab.h>

#include <linux/string.h>

#include <linux/sys_soc.h>



#define CTRLMMR_WKUP_JTAGID_REG		0

/*

 * Bits:

 *  31-28 VARIANT	Device variant

 *  27-12 PARTNO	Part number

 *  11-1  MFG		Indicates TI as manufacturer (0x17)

 *  1			Always 1

 */

#define CTRLMMR_WKUP_JTAGID_VARIANT_SHIFT	(28)

#define CTRLMMR_WKUP_JTAGID_VARIANT_MASK	GENMASK(31, 28)



#define CTRLMMR_WKUP_JTAGID_PARTNO_SHIFT	(12)

#define CTRLMMR_WKUP_JTAGID_PARTNO_MASK		GENMASK(27, 12)



#define CTRLMMR_WKUP_JTAGID_MFG_SHIFT		(1)

#define CTRLMMR_WKUP_JTAGID_MFG_MASK		GENMASK(11, 1)



#define CTRLMMR_WKUP_JTAGID_MFG_TI		0x17



static const struct k3_soc_id {

	unsigned int id;

	const char *family_name;

} k3_soc_ids[] = {

	{ 0xBB5A, "AM65X" },

	{ 0xBB64, "J721E" },

};



static int

k3_chipinfo_partno_to_names(unsigned int partno,

			    struct soc_device_attribute *soc_dev_attr)

{

	int i;



	for (i = 0; i < ARRAY_SIZE(k3_soc_ids); i++)

		if (partno == k3_soc_ids[i].id) {

			soc_dev_attr->family = k3_soc_ids[i].family_name;

			return 0;

		}



	return -EINVAL;

}



static int k3_chipinfo_probe(struct platform_device *pdev)

{

	struct device_node *node = pdev->dev.of_node;

	struct soc_device_attribute *soc_dev_attr;

	struct device *dev = &pdev->dev;

	struct soc_device *soc_dev;

	struct regmap *regmap;

	u32 partno_id;

	u32 variant;

	u32 jtag_id;

	u32 mfg;

	int ret;



	regmap = device_node_to_regmap(node);

	if (IS_ERR(regmap))

		return PTR_ERR(regmap);



	ret = regmap_read(regmap, CTRLMMR_WKUP_JTAGID_REG, &jtag_id);

	if (ret < 0)

		return ret;



	mfg = (jtag_id & CTRLMMR_WKUP_JTAGID_MFG_MASK) >>

	       CTRLMMR_WKUP_JTAGID_MFG_SHIFT;



	if (mfg != CTRLMMR_WKUP_JTAGID_MFG_TI) {

		dev_err(dev, "Invalid MFG SoC\n");

		return -ENODEV;

	}



	variant = (jtag_id & CTRLMMR_WKUP_JTAGID_VARIANT_MASK) >>

		  CTRLMMR_WKUP_JTAGID_VARIANT_SHIFT;

	variant++;



	partno_id = (jtag_id & CTRLMMR_WKUP_JTAGID_PARTNO_MASK) >>

		 CTRLMMR_WKUP_JTAGID_PARTNO_SHIFT;



	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);

	if (!soc_dev_attr)

		return -ENOMEM;



	soc_dev_attr->revision = kasprintf(GFP_KERNEL, "SR%x.0", variant);

	if (!soc_dev_attr->revision) {

		ret = -ENOMEM;

		goto err;

	}



	ret = k3_chipinfo_partno_to_names(partno_id, soc_dev_attr);

	if (ret) {

		dev_err(dev, "Unknown SoC JTAGID[0x%08X]\n", jtag_id);

		ret = -ENODEV;

		goto err_free_rev;

	}



	node = of_find_node_by_path("/");

	of_property_read_string(node, "model", &soc_dev_attr->machine);

	of_node_put(node);



	soc_dev = soc_device_register(soc_dev_attr);

	if (IS_ERR(soc_dev)) {

		ret = PTR_ERR(soc_dev);

		goto err_free_rev;

	}



	dev_info(dev, "Family:%s rev:%s JTAGID[0x%08x] Detected\n",

		 soc_dev_attr->family,

		 soc_dev_attr->revision, jtag_id);



	return 0;



err_free_rev:

	kfree(soc_dev_attr->revision);

err:

	kfree(soc_dev_attr);

	return ret;

}



static const struct of_device_id k3_chipinfo_of_match[] = {

	{ .compatible = "ti,am654-chipid", },

	{ /* sentinel */ },

};



static struct platform_driver k3_chipinfo_driver = {

	.driver = {

		.name = "k3-chipinfo",

		.of_match_table = k3_chipinfo_of_match,

	},

	.probe = k3_chipinfo_probe,

};



static int __init k3_chipinfo_init(void)

{

	return platform_driver_register(&k3_chipinfo_driver);

}

subsys_initcall(k3_chipinfo_init);

CRA Git | Maintained and supported by SUSTech CRA and CCSE