clk: qcom: gdsc: Add support for gdscs with HW control (904bb4f5) · Commits · 戴 / test

drivers/clk/qcom/gdsc.c

+18 −0

Original line number	Diff line number	Diff line
		@@ -56,6 +56,13 @@ static int gdsc_is_enabled(struct gdsc *sc, unsigned int reg)
		return !!(val & PWR_ON_MASK);
		}

		static int gdsc_hwctrl(struct gdsc *sc, bool en)
		{
		u32 val = en ? HW_CONTROL_MASK : 0;

		return regmap_update_bits(sc->regmap, sc->gdscr, HW_CONTROL_MASK, val);
		}

		static int gdsc_toggle_logic(struct gdsc *sc, bool en)
		{
		int ret;
		@@ -180,6 +187,10 @@ static int gdsc_enable(struct generic_pm_domain *domain)
		*/
		udelay(1);

		/* Turn on HW trigger mode if supported */
		if (sc->flags & HW_CTRL)
		return gdsc_hwctrl(sc, true);

		return 0;
		}

		@@ -191,6 +202,13 @@ static int gdsc_disable(struct generic_pm_domain *domain)
		if (sc->pwrsts == PWRSTS_ON)
		return gdsc_assert_reset(sc);

		/* Turn off HW trigger mode if supported */
		if (sc->flags & HW_CTRL) {
		ret = gdsc_hwctrl(sc, false);
		if (ret < 0)
		return ret;
		}

		if (sc->pwrsts & PWRSTS_OFF)
		gdsc_clear_mem_on(sc);

+1 −0

Original line number	Diff line number	Diff line
		@@ -52,6 +52,7 @@ struct gdsc {
		const u8 flags;
		#define VOTABLE BIT(0)
		#define CLAMP_IO BIT(1)
		#define HW_CTRL BIT(2)
		struct reset_controller_dev *rcdev;
		unsigned int *resets;
		unsigned int reset_count;