Commit 90438ac8 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-fixes-4.2' of git://people.freedesktop.org/~agd5f/linux into drm-fixes 

More radeon and amdgpu fixes for 4.2.  Mostly amdgpu bug fixes.

* 'drm-fixes-4.2' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu/dce8: Re-set VBLANK interrupt state when enabling a CRTC
  drm/radeon/ci: silence a harmless PCC warning
  drm/amdgpu/cz: silence some dpm debug output
  drm/amdgpu/cz: store the forced dpm level
  drm/amdgpu/cz: unforce dpm levels before forcing to low/high
  drm/amdgpu: remove bogus check in gfx8 rb setup
  drm/amdgpu: set proper index/data pair for smc regs on CZ (v2)
  drm/amdgpu: disable the IP module if early_init returns -ENOENT (v2)
  drm/amdgpu: stop context leak in the error path
  drm/amdgpu: validate the context id in the dependencies
  drm/radeon: fix user ptr race condition
  drm/radeon: Don't flush the GART TLB if rdev->gart.ptr == NULL
  drm/radeon: add a dpm quirk for Sapphire Radeon R9 270X 2GB GDDR5
parents 3aa20508 1002d718

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+16 −3
Original line number Diff line number Diff line
@@ -669,6 +669,7 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev, 
static int amdgpu_cs_dependencies(struct amdgpu_device *adev,

				  struct amdgpu_cs_parser *p)

{

	struct amdgpu_fpriv *fpriv = p->filp->driver_priv;

	struct amdgpu_ib *ib;

	int i, j, r;
@@ -694,6 +695,7 @@ static int amdgpu_cs_dependencies(struct amdgpu_device *adev, 
		for (j = 0; j < num_deps; ++j) {

			struct amdgpu_fence *fence;

			struct amdgpu_ring *ring;

			struct amdgpu_ctx *ctx;



			r = amdgpu_cs_get_ring(adev, deps[j].ip_type,

					       deps[j].ip_instance,
@@ -701,14 +703,21 @@ static int amdgpu_cs_dependencies(struct amdgpu_device *adev, 
			if (r)

				return r;



			ctx = amdgpu_ctx_get(fpriv, deps[j].ctx_id);

			if (ctx == NULL)

				return -EINVAL;



			r = amdgpu_fence_recreate(ring, p->filp,

						  deps[j].handle,

						  &fence);

			if (r)

			if (r) {

				amdgpu_ctx_put(ctx);

				return r;

			}



			amdgpu_sync_fence(&ib->sync, fence);

			amdgpu_fence_unref(&fence);

			amdgpu_ctx_put(ctx);

		}

	}
@@ -808,12 +817,16 @@ int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data, 


	r = amdgpu_cs_get_ring(adev, wait->in.ip_type, wait->in.ip_instance,

			       wait->in.ring, &ring);

	if (r)

	if (r) {

		amdgpu_ctx_put(ctx);

		return r;

	}



	r = amdgpu_fence_recreate(ring, filp, wait->in.handle, &fence);

	if (r)

	if (r) {

		amdgpu_ctx_put(ctx);

		return r;

	}



	r = fence_wait_timeout(&fence->base, true, timeout);

	amdgpu_fence_unref(&fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+7 −2
Original line number Diff line number Diff line
@@ -1207,10 +1207,15 @@ static int amdgpu_early_init(struct amdgpu_device *adev) 
		} else {

			if (adev->ip_blocks[i].funcs->early_init) {

				r = adev->ip_blocks[i].funcs->early_init((void *)adev);

				if (r)

				if (r == -ENOENT)

					adev->ip_block_enabled[i] = false;

				else if (r)

					return r;

			}

				else

					adev->ip_block_enabled[i] = true;

			} else {

				adev->ip_block_enabled[i] = true;

			}

		}

	}

drivers/gpu/drm/amd/amdgpu/cz_dpm.c

+12 −4
Original line number Diff line number Diff line
@@ -1679,7 +1679,7 @@ static int cz_dpm_unforce_dpm_levels(struct amdgpu_device *adev) 
	if (ret)

		return ret;



	DRM_INFO("DPM unforce state min=%d, max=%d.\n",

	DRM_DEBUG("DPM unforce state min=%d, max=%d.\n",

		  pi->sclk_dpm.soft_min_clk,

		  pi->sclk_dpm.soft_max_clk);
@@ -1693,11 +1693,17 @@ static int cz_dpm_force_dpm_level(struct amdgpu_device *adev, 


	switch (level) {

	case AMDGPU_DPM_FORCED_LEVEL_HIGH:

		ret = cz_dpm_unforce_dpm_levels(adev);

		if (ret)

			return ret;

		ret = cz_dpm_force_highest(adev);

		if (ret)

			return ret;

		break;

	case AMDGPU_DPM_FORCED_LEVEL_LOW:

		ret = cz_dpm_unforce_dpm_levels(adev);

		if (ret)

			return ret;

		ret = cz_dpm_force_lowest(adev);

		if (ret)

			return ret;
@@ -1711,6 +1717,8 @@ static int cz_dpm_force_dpm_level(struct amdgpu_device *adev, 
		break;

	}



	adev->pm.dpm.forced_level = level;



	return ret;

}

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

+4 −0
Original line number Diff line number Diff line
@@ -2566,6 +2566,7 @@ static void dce_v8_0_crtc_dpms(struct drm_crtc *crtc, int mode) 
	struct drm_device *dev = crtc->dev;

	struct amdgpu_device *adev = dev->dev_private;

	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

	unsigned type;



	switch (mode) {

	case DRM_MODE_DPMS_ON:
@@ -2574,6 +2575,9 @@ static void dce_v8_0_crtc_dpms(struct drm_crtc *crtc, int mode) 
		dce_v8_0_vga_enable(crtc, true);

		amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);

		dce_v8_0_vga_enable(crtc, false);

		/* Make sure VBLANK interrupt is still enabled */

		type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id);

		amdgpu_irq_update(adev, &adev->crtc_irq, type);

		drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id);

		dce_v8_0_crtc_load_lut(crtc);

		break;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+1 −4
Original line number Diff line number Diff line
@@ -1813,10 +1813,7 @@ static u32 gfx_v8_0_get_rb_disabled(struct amdgpu_device *adev, 
	u32 data, mask;



	data = RREG32(mmCC_RB_BACKEND_DISABLE);

	if (data & 1)

	data &= CC_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK;

	else

		data = 0;



	data |= RREG32(mmGC_USER_RB_BACKEND_DISABLE);

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