Commit 8fdacf2a authored by Oded Gabbay's avatar Oded Gabbay
Browse files

habanalabs: set TPC Icache to 16 cache lines 



Reduce latency to memory during TPC kernel execution.

Signed-off-by: default avatarOded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: default avatarTomer Tayar <ttayar@habana.ai>
parent cb596aee

drivers/misc/habanalabs/goya/goya.c

+3 −0
Original line number Diff line number Diff line
@@ -1457,6 +1457,9 @@ static void goya_init_golden_registers(struct hl_device *hdev) 
				1 << TPC0_NRTR_SCRAMB_EN_VAL_SHIFT);

		WREG32(mmTPC0_NRTR_NON_LIN_SCRAMB + offset,

				1 << TPC0_NRTR_NON_LIN_SCRAMB_EN_SHIFT);



		WREG32_FIELD(TPC0_CFG_MSS_CONFIG, offset,

				ICACHE_FETCH_LINE_NUM, 2);

	}



	WREG32(mmDMA_NRTR_SCRAMB_EN, 1 << DMA_NRTR_SCRAMB_EN_VAL_SHIFT);

drivers/misc/habanalabs/habanalabs.h

+4 −3
Original line number Diff line number Diff line
@@ -1062,8 +1062,9 @@ void hl_wreg(struct hl_device *hdev, u32 reg, u32 val); 


#define REG_FIELD_SHIFT(reg, field) reg##_##field##_SHIFT

#define REG_FIELD_MASK(reg, field) reg##_##field##_MASK

#define WREG32_FIELD(reg, field, val)	\

	WREG32(mm##reg, (RREG32(mm##reg) & ~REG_FIELD_MASK(reg, field)) | \

#define WREG32_FIELD(reg, offset, field, val)	\

	WREG32(mm##reg + offset, (RREG32(mm##reg + offset) & \

				~REG_FIELD_MASK(reg, field)) | \

				(val) << REG_FIELD_SHIFT(reg, field))



/* Timeout should be longer when working with simulator but cap the

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