Commit 8fc37b82 authored by Mian Yousaf Kaukab's avatar Mian Yousaf Kaukab Committed by Felipe Balbi
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usb: dwc2: gadget: handle reset interrupt before endpoint interrupts 



If system is loaded, reset, enum-done and setup interrupts can occur
at the same time. Current interrupt handling sequence will handle
setup packet's interrupt before handling reset interrupt. Which will
break the enumeration process. Correct sequence is to handle reset,
enum-done and then any other endpoint interrupts.

Signed-off-by: default avatarMian Yousaf Kaukab <yousaf.kaukab@intel.com>
Tested-by: default avatarRobert Baldyga <r.baldyga@samsung.com>
Tested-by: default avatarDinh Nguyen <dinguyen@opensource.altera.com>
Tested-by: default avatarJohn Youn <johnyoun@synopsys.com>
Acked-by: default avatarJohn Youn <johnyoun@synopsys.com>
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
parent 61f7223b

drivers/usb/dwc2/gadget.c

+30 −30
Original line number Diff line number Diff line
@@ -2460,6 +2460,36 @@ irq_retry: 


	gintsts &= gintmsk;



	if (gintsts & GINTSTS_RESETDET) {

		dev_dbg(hsotg->dev, "%s: USBRstDet\n", __func__);



		dwc2_writel(GINTSTS_RESETDET, hsotg->regs + GINTSTS);



		/* This event must be used only if controller is suspended */

		if (hsotg->lx_state == DWC2_L2) {

			dwc2_exit_hibernation(hsotg, true);

			hsotg->lx_state = DWC2_L0;

		}

	}



	if (gintsts & (GINTSTS_USBRST | GINTSTS_RESETDET)) {



		u32 usb_status = dwc2_readl(hsotg->regs + GOTGCTL);

		u32 connected = hsotg->connected;



		dev_dbg(hsotg->dev, "%s: USBRst\n", __func__);

		dev_dbg(hsotg->dev, "GNPTXSTS=%08x\n",

			dwc2_readl(hsotg->regs + GNPTXSTS));



		dwc2_writel(GINTSTS_USBRST, hsotg->regs + GINTSTS);



		/* Report disconnection if it is not already done. */

		dwc2_hsotg_disconnect(hsotg);



		if (usb_status & GOTGCTL_BSESVLD && connected)

			dwc2_hsotg_core_init_disconnected(hsotg, true);

	}



	if (gintsts & GINTSTS_ENUMDONE) {

		dwc2_writel(GINTSTS_ENUMDONE, hsotg->regs + GINTSTS);
@@ -2491,36 +2521,6 @@ irq_retry: 
		}

	}



	if (gintsts & GINTSTS_RESETDET) {

		dev_dbg(hsotg->dev, "%s: USBRstDet\n", __func__);



		dwc2_writel(GINTSTS_RESETDET, hsotg->regs + GINTSTS);



		/* This event must be used only if controller is suspended */

		if (hsotg->lx_state == DWC2_L2) {

			dwc2_exit_hibernation(hsotg, true);

			hsotg->lx_state = DWC2_L0;

		}

	}



	if (gintsts & (GINTSTS_USBRST | GINTSTS_RESETDET)) {



		u32 usb_status = dwc2_readl(hsotg->regs + GOTGCTL);

		u32 connected = hsotg->connected;



		dev_dbg(hsotg->dev, "%s: USBRst\n", __func__);

		dev_dbg(hsotg->dev, "GNPTXSTS=%08x\n",

			dwc2_readl(hsotg->regs + GNPTXSTS));



		dwc2_writel(GINTSTS_USBRST, hsotg->regs + GINTSTS);



		/* Report disconnection if it is not already done. */

		dwc2_hsotg_disconnect(hsotg);



		if (usb_status & GOTGCTL_BSESVLD && connected)

			dwc2_hsotg_core_init_disconnected(hsotg, true);

	}



	/* check both FIFOs */



	if (gintsts & GINTSTS_NPTXFEMP) {

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