Commit 8fae442f authored by Suneel Garapati's avatar Suneel Garapati Committed by Michal Simek
Browse files

devicetree: xilinx: zynqmp: add sata node 



add sata node with sata fixed clock nodes in dtsi file.
enable sata in zynqmp-ep108.dts with broken-gen2.

Signed-off-by: default avatarSuneel Garapati <suneel.garapati@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent d770e558

arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts

+5 −0
Original line number Original line Diff line number Diff line
@@ -42,6 +42,11 @@ 
	};

	};

};

};





&sata {

	status = "okay";

	ceva,broken-gen2;

};



&uart0 {

&uart0 {

	status = "okay";

	status = "okay";

};
 
};

arch/arm64/boot/dts/xilinx/zynqmp.dtsi

+15 −0
Original line number Original line Diff line number Diff line
@@ -272,6 +272,21 @@ 
			#size-cells = <0>;

			#size-cells = <0>;

		};

		};





		sata_clk: sata_clk {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <75000000>;

		};



		sata: ahci@fd0c0000 {

			compatible = "ceva,ahci-1v84";

			status = "disabled";

			reg = <0x0 0xfd0c0000 0x2000>;

			interrupt-parent = <&gic>;

			interrupts = <0 133 4>;

			clocks = <&sata_clk>;

		};



		sdhci0: sdhci@ff160000 {

		sdhci0: sdhci@ff160000 {

			compatible = "arasan,sdhci-8.9a";

			compatible = "arasan,sdhci-8.9a";

			status = "disabled";

			status = "disabled";

CRA Git | Maintained and supported by SUSTech CRA and CCSE