Commit 8fa956e3 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'dsa-misc-improvements' 



Florian Fainelli says:

====================
net: dsa: misc improvements

This patch series builds on top of Andrew's "New DSA bind, switches as devices"
patch set and does the following:

- add a few helper functions/goodies for net/dsa/dsa2.c to be as close as possible
  from net/dsa/dsa.c in terms of what drivers can expect, in particular the slave
  MDIO bus and the enabled_port_mask and phy_mii_mask

- fix the CPU port ethtools ops to work in a multiple tree setup since we can
  no longer assume a single tree is supported

- make the bcm_sf2 driver register its own MDIO bus, yet assign it to
  ds->slave_mii_bus for everything to work in net/dsa/slave.c wrt. PHY probing,
  this is a tad cleaner than what we have now

Changes in v2:

Most of the previous patches have been dropped to just keep the relevant ones
now.

Changes in v3:
- split the addition of the slave MII bus as a separate patch
- properly unwind all operations at the right place and right time (ethtool ops,
  slave MDIO bus
- fixed a few typos here and there

Changes in v4:
- removed superfluous dst agrument to dsa_cpu_port_ethtool_{setup,restore}
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 123b3652 461cd1b0

drivers/net/dsa/bcm_sf2.c

+134 −81
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#include <linux/of_irq.h>

#include <linux/of_address.h>

#include <linux/of_net.h>

#include <linux/of_mdio.h>

#include <net/dsa.h>

#include <linux/ethtool.h>

#include <linux/if_bridge.h>
@@ -836,6 +837,66 @@ static int bcm_sf2_sw_fdb_dump(struct dsa_switch *ds, int port, 
	return 0;

}



static int bcm_sf2_sw_indir_rw(struct bcm_sf2_priv *priv, int op, int addr,

			       int regnum, u16 val)

{

	int ret = 0;

	u32 reg;



	reg = reg_readl(priv, REG_SWITCH_CNTRL);

	reg |= MDIO_MASTER_SEL;

	reg_writel(priv, reg, REG_SWITCH_CNTRL);



	/* Page << 8 | offset */

	reg = 0x70;

	reg <<= 2;

	core_writel(priv, addr, reg);



	/* Page << 8 | offset */

	reg = 0x80 << 8 | regnum << 1;

	reg <<= 2;



	if (op)

		ret = core_readl(priv, reg);

	else

		core_writel(priv, val, reg);



	reg = reg_readl(priv, REG_SWITCH_CNTRL);

	reg &= ~MDIO_MASTER_SEL;

	reg_writel(priv, reg, REG_SWITCH_CNTRL);



	return ret & 0xffff;

}



static int bcm_sf2_sw_mdio_read(struct mii_bus *bus, int addr, int regnum)

{

	struct bcm_sf2_priv *priv = bus->priv;



	/* Intercept reads from Broadcom pseudo-PHY address, else, send

	 * them to our master MDIO bus controller

	 */

	if (addr == BRCM_PSEUDO_PHY_ADDR && priv->indir_phy_mask & BIT(addr))

		return bcm_sf2_sw_indir_rw(priv, 1, addr, regnum, 0);

	else

		return mdiobus_read(priv->master_mii_bus, addr, regnum);

}



static int bcm_sf2_sw_mdio_write(struct mii_bus *bus, int addr, int regnum,

				 u16 val)

{

	struct bcm_sf2_priv *priv = bus->priv;



	/* Intercept writes to the Broadcom pseudo-PHY address, else,

	 * send them to our master MDIO bus controller

	 */

	if (addr == BRCM_PSEUDO_PHY_ADDR && priv->indir_phy_mask & BIT(addr))

		bcm_sf2_sw_indir_rw(priv, 0, addr, regnum, val);

	else

		mdiobus_write(priv->master_mii_bus, addr, regnum, val);



	return 0;

}



static irqreturn_t bcm_sf2_switch_0_isr(int irq, void *dev_id)

{

	struct bcm_sf2_priv *priv = dev_id;
@@ -932,6 +993,72 @@ static void bcm_sf2_identify_ports(struct bcm_sf2_priv *priv, 
	}

}



static int bcm_sf2_mdio_register(struct dsa_switch *ds)

{

	struct bcm_sf2_priv *priv = ds_to_priv(ds);

	struct device_node *dn;

	static int index;

	int err;



	/* Find our integrated MDIO bus node */

	dn = of_find_compatible_node(NULL, NULL, "brcm,unimac-mdio");

	priv->master_mii_bus = of_mdio_find_bus(dn);

	if (!priv->master_mii_bus)

		return -EPROBE_DEFER;



	get_device(&priv->master_mii_bus->dev);

	priv->master_mii_dn = dn;



	priv->slave_mii_bus = devm_mdiobus_alloc(ds->dev);

	if (!priv->slave_mii_bus)

		return -ENOMEM;



	priv->slave_mii_bus->priv = priv;

	priv->slave_mii_bus->name = "sf2 slave mii";

	priv->slave_mii_bus->read = bcm_sf2_sw_mdio_read;

	priv->slave_mii_bus->write = bcm_sf2_sw_mdio_write;

	snprintf(priv->slave_mii_bus->id, MII_BUS_ID_SIZE, "sf2-%d",

		 index++);

	priv->slave_mii_bus->dev.of_node = dn;



	/* Include the pseudo-PHY address to divert reads towards our

	 * workaround. This is only required for 7445D0, since 7445E0

	 * disconnects the internal switch pseudo-PHY such that we can use the

	 * regular SWITCH_MDIO master controller instead.

	 *

	 * Here we flag the pseudo PHY as needing special treatment and would

	 * otherwise make all other PHY read/writes go to the master MDIO bus

	 * controller that comes with this switch backed by the "mdio-unimac"

	 * driver.

	 */

	if (of_machine_is_compatible("brcm,bcm7445d0"))

		priv->indir_phy_mask |= (1 << BRCM_PSEUDO_PHY_ADDR);

	else

		priv->indir_phy_mask = 0;



	ds->phys_mii_mask = priv->indir_phy_mask;

	ds->slave_mii_bus = priv->slave_mii_bus;

	priv->slave_mii_bus->parent = ds->dev->parent;

	priv->slave_mii_bus->phy_mask = ~priv->indir_phy_mask;



	if (dn)

		err = of_mdiobus_register(priv->slave_mii_bus, dn);

	else

		err = mdiobus_register(priv->slave_mii_bus);



	if (err)

		of_node_put(dn);



	return err;

}



static void bcm_sf2_mdio_unregister(struct bcm_sf2_priv *priv)

{

	mdiobus_unregister(priv->slave_mii_bus);

	if (priv->master_mii_dn)

		of_node_put(priv->master_mii_dn);

}



static int bcm_sf2_sw_setup(struct dsa_switch *ds)

{

	const char *reg_names[BCM_SF2_REGS_NUM] = BCM_SF2_REGS_NAME;
@@ -972,6 +1099,12 @@ static int bcm_sf2_sw_setup(struct dsa_switch *ds) 
		goto out_unmap;

	}



	ret = bcm_sf2_mdio_register(ds);

	if (ret) {

		pr_err("failed to register MDIO bus\n");

		goto out_unmap;

	}



	/* Disable all interrupts and request them */

	bcm_sf2_intr_disable(priv);
@@ -1017,23 +1150,6 @@ static int bcm_sf2_sw_setup(struct dsa_switch *ds) 
			bcm_sf2_port_disable(ds, port, NULL);

	}



	/* Include the pseudo-PHY address and the broadcast PHY address to

	 * divert reads towards our workaround. This is only required for

	 * 7445D0, since 7445E0 disconnects the internal switch pseudo-PHY such

	 * that we can use the regular SWITCH_MDIO master controller instead.

	 *

	 * By default, DSA initializes ds->phys_mii_mask to

	 * ds->enabled_port_mask to have a 1:1 mapping between Port address

	 * and PHY address in order to utilize the slave_mii_bus instance to

	 * read from Port PHYs. This is not what we want here, so we

	 * initialize phys_mii_mask 0 to always utilize the "master" MDIO

	 * bus backed by the "mdio-unimac" driver.

	 */

	if (of_machine_is_compatible("brcm,bcm7445d0"))

		ds->phys_mii_mask |= ((1 << BRCM_PSEUDO_PHY_ADDR) | (1 << 0));

	else

		ds->phys_mii_mask = 0;



	rev = reg_readl(priv, REG_SWITCH_REVISION);

	priv->hw_params.top_rev = (rev >> SWITCH_TOP_REV_SHIFT) &

					SWITCH_TOP_REV_MASK;
@@ -1058,6 +1174,7 @@ out_unmap: 
			iounmap(*base);

		base++;

	}

	bcm_sf2_mdio_unregister(priv);

	return ret;

}
@@ -1078,68 +1195,6 @@ static u32 bcm_sf2_sw_get_phy_flags(struct dsa_switch *ds, int port) 
	return priv->hw_params.gphy_rev;

}



static int bcm_sf2_sw_indir_rw(struct dsa_switch *ds, int op, int addr,

			       int regnum, u16 val)

{

	struct bcm_sf2_priv *priv = ds_to_priv(ds);

	int ret = 0;

	u32 reg;



	reg = reg_readl(priv, REG_SWITCH_CNTRL);

	reg |= MDIO_MASTER_SEL;

	reg_writel(priv, reg, REG_SWITCH_CNTRL);



	/* Page << 8 | offset */

	reg = 0x70;

	reg <<= 2;

	core_writel(priv, addr, reg);



	/* Page << 8 | offset */

	reg = 0x80 << 8 | regnum << 1;

	reg <<= 2;



	if (op)

		ret = core_readl(priv, reg);

	else

		core_writel(priv, val, reg);



	reg = reg_readl(priv, REG_SWITCH_CNTRL);

	reg &= ~MDIO_MASTER_SEL;

	reg_writel(priv, reg, REG_SWITCH_CNTRL);



	return ret & 0xffff;

}



static int bcm_sf2_sw_phy_read(struct dsa_switch *ds, int addr, int regnum)

{

	/* Intercept reads from the MDIO broadcast address or Broadcom

	 * pseudo-PHY address

	 */

	switch (addr) {

	case 0:

	case BRCM_PSEUDO_PHY_ADDR:

		return bcm_sf2_sw_indir_rw(ds, 1, addr, regnum, 0);

	default:

		return 0xffff;

	}

}



static int bcm_sf2_sw_phy_write(struct dsa_switch *ds, int addr, int regnum,

				u16 val)

{

	/* Intercept writes to the MDIO broadcast address or Broadcom

	 * pseudo-PHY address

	 */

	switch (addr) {

	case 0:

	case BRCM_PSEUDO_PHY_ADDR:

		bcm_sf2_sw_indir_rw(ds, 0, addr, regnum, val);

		break;

	}



	return 0;

}



static void bcm_sf2_sw_adjust_link(struct dsa_switch *ds, int port,

				   struct phy_device *phydev)

{
@@ -1376,8 +1431,6 @@ static struct dsa_switch_driver bcm_sf2_switch_driver = { 
	.setup			= bcm_sf2_sw_setup,

	.set_addr		= bcm_sf2_sw_set_addr,

	.get_phy_flags		= bcm_sf2_sw_get_phy_flags,

	.phy_read		= bcm_sf2_sw_phy_read,

	.phy_write		= bcm_sf2_sw_phy_write,

	.get_strings		= bcm_sf2_sw_get_strings,

	.get_ethtool_stats	= bcm_sf2_sw_get_ethtool_stats,

	.get_sset_count		= bcm_sf2_sw_get_sset_count,

drivers/net/dsa/bcm_sf2.h

+6 −0
Original line number Diff line number Diff line
@@ -142,6 +142,12 @@ struct bcm_sf2_priv { 


	/* Bitmask of ports having an integrated PHY */

	unsigned int			int_phy_mask;



	/* Master and slave MDIO bus controller */

	unsigned int			indir_phy_mask;

	struct device_node		*master_mii_dn;

	struct mii_bus			*slave_mii_bus;

	struct mii_bus			*master_mii_bus;

};



struct bcm_sf2_hw_stats {

include/net/dsa.h

+1 −0
Original line number Diff line number Diff line
@@ -116,6 +116,7 @@ struct dsa_switch_tree { 
	 * Original copy of the master netdev ethtool_ops

	 */

	struct ethtool_ops	master_ethtool_ops;

	const struct ethtool_ops *master_orig_ethtool_ops;



	/*

	 * The switch and port to which the CPU is attached.

net/dsa/dsa.c

+41 −0
Original line number Diff line number Diff line
@@ -266,6 +266,41 @@ const struct dsa_device_ops *dsa_resolve_tag_protocol(int tag_protocol) 
	return ops;

}



int dsa_cpu_port_ethtool_setup(struct dsa_switch *ds)

{

	struct net_device *master;

	struct ethtool_ops *cpu_ops;



	master = ds->dst->master_netdev;

	if (ds->master_netdev)

		master = ds->master_netdev;



	cpu_ops = devm_kzalloc(ds->dev, sizeof(*cpu_ops), GFP_KERNEL);

	if (!cpu_ops)

		return -ENOMEM;



	memcpy(&ds->dst->master_ethtool_ops, master->ethtool_ops,

	       sizeof(struct ethtool_ops));

	ds->dst->master_orig_ethtool_ops = master->ethtool_ops;

	memcpy(cpu_ops, &ds->dst->master_ethtool_ops,

	       sizeof(struct ethtool_ops));

	dsa_cpu_port_ethtool_init(cpu_ops);

	master->ethtool_ops = cpu_ops;



	return 0;

}



void dsa_cpu_port_ethtool_restore(struct dsa_switch *ds)

{

	struct net_device *master;



	master = ds->dst->master_netdev;

	if (ds->master_netdev)

		master = ds->master_netdev;



	master->ethtool_ops = ds->dst->master_orig_ethtool_ops;

}



static int dsa_switch_setup_one(struct dsa_switch *ds, struct device *parent)

{

	struct dsa_switch_driver *drv = ds->drv;
@@ -379,6 +414,10 @@ static int dsa_switch_setup_one(struct dsa_switch *ds, struct device *parent) 
		ret = 0;

	}



	ret = dsa_cpu_port_ethtool_setup(ds);

	if (ret)

		return ret;



#ifdef CONFIG_NET_DSA_HWMON

	/* If the switch provides a temperature sensor,

	 * register with hardware monitoring subsystem.
@@ -963,6 +1002,8 @@ static void dsa_remove_dst(struct dsa_switch_tree *dst) 
			dsa_switch_destroy(ds);

	}



	dsa_cpu_port_ethtool_restore(dst->ds[0]);



	dev_put(dst->master_netdev);

}

net/dsa/dsa2.c

+36 −0
Original line number Diff line number Diff line
@@ -283,6 +283,7 @@ static void dsa_user_port_unapply(struct device_node *port, u32 index, 
	if (ds->ports[index].netdev) {

		dsa_slave_destroy(ds->ports[index].netdev);

		ds->ports[index].netdev = NULL;

		ds->enabled_port_mask &= ~(1 << index);

	}

}
@@ -292,6 +293,13 @@ static int dsa_ds_apply(struct dsa_switch_tree *dst, struct dsa_switch *ds) 
	u32 index;

	int err;



	/* Initialize ds->phys_mii_mask before registering the slave MDIO bus

	 * driver and before drv->setup() has run, since the switch drivers and

	 * the slave MDIO bus driver rely on these values for probing PHY

	 * devices or not

	 */

	ds->phys_mii_mask = ds->enabled_port_mask;



	err = ds->drv->setup(ds);

	if (err < 0)

		return err;
@@ -304,6 +312,18 @@ static int dsa_ds_apply(struct dsa_switch_tree *dst, struct dsa_switch *ds) 
	if (err < 0)

		return err;



	if (!ds->slave_mii_bus && ds->drv->phy_read) {

		ds->slave_mii_bus = devm_mdiobus_alloc(ds->dev);

		if (!ds->slave_mii_bus)

			return -ENOMEM;



		dsa_slave_mii_bus_init(ds);



		err = mdiobus_register(ds->slave_mii_bus);

		if (err < 0)

			return err;

	}



	for (index = 0; index < DSA_MAX_PORTS; index++) {

		port = ds->ports[index].dn;

		if (!port)
@@ -353,6 +373,9 @@ static void dsa_ds_unapply(struct dsa_switch_tree *dst, struct dsa_switch *ds) 


		dsa_user_port_unapply(port, index, ds);

	}



	if (ds->slave_mii_bus && ds->drv->phy_read)

		mdiobus_unregister(ds->slave_mii_bus);

}



static int dsa_dst_apply(struct dsa_switch_tree *dst)
@@ -371,6 +394,10 @@ static int dsa_dst_apply(struct dsa_switch_tree *dst) 
			return err;

	}



	err = dsa_cpu_port_ethtool_setup(dst->ds[0]);

	if (err)

		return err;



	/* If we use a tagging format that doesn't have an ethertype

	 * field, make sure that all packets from this point on get

	 * sent to the tag format's receive function.
@@ -406,6 +433,8 @@ static void dsa_dst_unapply(struct dsa_switch_tree *dst) 
		dsa_ds_unapply(dst, ds);

	}



	dsa_cpu_port_ethtool_restore(dst->ds[0]);



	pr_info("DSA: tree %d unapplied\n", dst->tree);

	dst->applied = false;

}
@@ -511,6 +540,13 @@ static int dsa_parse_ports_dn(struct device_node *ports, struct dsa_switch *ds) 
			return -EINVAL;



		ds->ports[reg].dn = port;



		/* Initialize enabled_port_mask now for drv->setup()

		 * to have access to a correct value, just like what

		 * net/dsa/dsa.c::dsa_switch_setup_one does.

		 */

		if (!dsa_port_is_cpu(port))

			ds->enabled_port_mask |= 1 << reg;

	}



	return 0;

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