Merge tag 'for-linus-20160324' of git://git.infradead.org/linux-mtd

Atmel NAND flash

Required properties:

- compatible : should be "atmel,at91rm9200-nand" or "atmel,sama5d4-nand".

- compatible: The possible values are:

	"atmel,at91rm9200-nand"

	"atmel,sama5d2-nand"

	"atmel,sama5d4-nand"

- reg : should specify localbus address and size used for the chip,

	and hardware ECC controller if available.

	If the hardware ECC is PMECC, it should contain address and size for

- nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.

  Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",

  "soft_bch".

- atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware.

  Only supported by at91sam9x5 or later sam9 product.

- atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware,

  capable of BCH encoding and decoding, on devices where it is present.

- atmel,pmecc-cap : error correct capability for Programmable Multibit ECC

  Controller. Supported values are: 2, 4, 8, 12, 24.

  Controller. Supported values are: 2, 4, 8, 12, 24. If the compatible string

  is "atmel,sama5d2-nand", 32 is also valid.

- atmel,pmecc-sector-size : sector size for ECC computation. Supported values

  are: 512, 1024.

- atmel,pmecc-lookup-table-offset : includes two offsets of lookup table in ROM

  sector size 1024. If not specified, driver will build the table in runtime.

- nand-bus-width : 8 or 16 bus width if not present 8

- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false

- Nand Flash Controller(NFC) is a slave driver under Atmel nand flash

  - Required properties:

    - compatible : "atmel,sama5d3-nfc".

Nand Flash Controller(NFC) is an optional sub-node

Required properties:

- compatible : "atmel,sama5d3-nfc" or "atmel,sama5d4-nfc".

- reg : should specify the address and size used for NFC command registers,

            NFC registers and NFC Sram. NFC Sram address and size can be absent

        NFC registers and NFC SRAM. NFC SRAM address and size can be absent

        if don't want to use it.

- clocks: phandle to the peripheral clock

  - Optional properties:

    - atmel,write-by-sram: boolean to enable NFC write by sram.

Optional properties:

- atmel,write-by-sram: boolean to enable NFC write by SRAM.

Examples:

nand0: nand@40000000,0 {

Required properties:

  - compatible : Should be "fsl,vf610-qspi", "fsl,imx6sx-qspi",

		 "fsl,imx7d-qspi", "fsl,imx6ul-qspi",

		 "fsl,ls1021-qspi"

		 "fsl,ls1021a-qspi"

		 or

		 "fsl,ls2080a-qspi" followed by "fsl,ls1021a-qspi"

  - reg : the first contains the register location and length,

          the second contains the memory mapping address and length

  - reg-names: Should contain the reg names "QuadSPI" and "QuadSPI-memory"

			      But if there are two NOR flashes connected to the

			      bus, you should enable this property.

			      (Please check the board's schematic.)

  - big-endian : That means the IP register is big endian

Example:

* Qualcomm NAND controller

Required properties:

- compatible:		should be "qcom,ipq806x-nand"

- reg:			MMIO address range

- clocks:		must contain core clock and always on clock

- clock-names:		must contain "core" for the core clock and "aon" for the

			always on clock

- dmas:			DMA specifier, consisting of a phandle to the ADM DMA

			controller node and the channel number to be used for

			NAND. Refer to dma.txt and qcom_adm.txt for more details

- dma-names:		must be "rxtx"

- qcom,cmd-crci:	must contain the ADM command type CRCI block instance

			number specified for the NAND controller on the given

			platform

- qcom,data-crci:	must contain the ADM data type CRCI block instance

			number specified for the NAND controller on the given

			platform

- #address-cells:	<1> - subnodes give the chip-select number

- #size-cells:		<0>

* NAND chip-select

Each controller may contain one or more subnodes to represent enabled

chip-selects which (may) contain NAND flash chips. Their properties are as

follows.

Required properties:

- compatible:		should contain "qcom,nandcs"

- reg:			a single integer representing the chip-select

			number (e.g., 0, 1, 2, etc.)

- #address-cells:	see partition.txt

- #size-cells:		see partition.txt

- nand-ecc-strength:	see nand.txt

- nand-ecc-step-size:	must be 512. see nand.txt for more details.

Optional properties:

- nand-bus-width:	see nand.txt

Each nandcs device node may optionally contain a 'partitions' sub-node, which

further contains sub-nodes describing the flash partition mapping. See

partition.txt for more detail.

Example:

nand@1ac00000 {

	compatible = "qcom,ebi2-nandc";

	reg = <0x1ac00000 0x800>;

	clocks = <&gcc EBI2_CLK>,

		 <&gcc EBI2_AON_CLK>;

	clock-names = "core", "aon";

	dmas = <&adm_dma 3>;

	dma-names = "rxtx";

	qcom,cmd-crci = <15>;

	qcom,data-crci = <3>;

	#address-cells = <1>;

	#size-cells = <0>;

	nandcs@0 {

		compatible = "qcom,nandcs";

		reg = <0>;

		nand-ecc-strength = <4>;

		nand-ecc-step-size = <512>;

		nand-bus-width = <8>;

		partitions {

			compatible = "fixed-partitions";

			#address-cells = <1>;

			#size-cells = <1>;

			partition@0 {

				label = "boot-nand";

				reg = <0 0x58a0000>;

			};

			partition@58a0000 {

				label = "fs-nand";

				reg = <0x58a0000 0x4000000>;

			};

		};

	};

};

			return -ENOMEM;

	}

	if (set->ecc_layout) {

		ptr = kmemdup(set->ecc_layout,

			      sizeof(struct nand_ecclayout), GFP_KERNEL);

		set->ecc_layout = ptr;

		if (!ptr)

			return -ENOMEM;

	}

	return 0;

}

	int			num_partitions;

	struct mtd_partition	*partitions;

	struct nand_ecclayout	*ecc_layout;

	unsigned char banks[JZ_NAND_NUM_BANKS];

	void (*ident_callback)(struct platform_device *, struct nand_chip *,