Commit 8f34c5b5 authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Borislav Petkov
Browse files

x86/exceptions: Make IST index zero based 



The defines for the exception stack (IST) array in the TSS are using the
SDM convention IST1 - IST7. That causes all sorts of code to subtract 1 for
array indices related to IST. That's confusing at best and does not provide
any value.

Make the indices zero based and fixup the usage sites. The only code which
needs to adjust the 0 based index is the interrupt descriptor setup which
needs to add 1 now.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Reviewed-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Baoquan He <bhe@redhat.com>
Cc: "Chang S. Bae" <chang.seok.bae@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Dominik Brodowski <linux@dominikbrodowski.net>
Cc: Dou Liyang <douly.fnst@cn.fujitsu.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: linux-doc@vger.kernel.org
Cc: Nicolai Stange <nstange@suse.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Qian Cai <cai@lca.pw>
Cc: x86-ml <x86@kernel.org>
Link: https://lkml.kernel.org/r/20190414160144.331772825@linutronix.de
parent 30842211

Documentation/x86/kernel-stacks

+4 −4
Original line number Diff line number Diff line
@@ -59,7 +59,7 @@ If that assumption is ever broken then the stacks will become corrupt. 


The currently assigned IST stacks are :-



* DOUBLEFAULT_STACK.  EXCEPTION_STKSZ (PAGE_SIZE).

* ESTACK_DF.  EXCEPTION_STKSZ (PAGE_SIZE).



  Used for interrupt 8 - Double Fault Exception (#DF).
@@ -68,7 +68,7 @@ The currently assigned IST stacks are :- 
  Using a separate stack allows the kernel to recover from it well enough

  in many cases to still output an oops.



* NMI_STACK.  EXCEPTION_STKSZ (PAGE_SIZE).

* ESTACK_NMI.  EXCEPTION_STKSZ (PAGE_SIZE).



  Used for non-maskable interrupts (NMI).
@@ -76,7 +76,7 @@ The currently assigned IST stacks are :- 
  middle of switching stacks.  Using IST for NMI events avoids making

  assumptions about the previous state of the kernel stack.



* DEBUG_STACK.  DEBUG_STKSZ

* ESTACK_DB.  DEBUG_STKSZ



  Used for hardware debug interrupts (interrupt 1) and for software

  debug interrupts (INT3).
@@ -86,7 +86,7 @@ The currently assigned IST stacks are :- 
  avoids making assumptions about the previous state of the kernel

  stack.



* MCE_STACK.  EXCEPTION_STKSZ (PAGE_SIZE).

* ESTACK_MCE.  EXCEPTION_STKSZ (PAGE_SIZE).



  Used for interrupt 18 - Machine Check Exception (#MC).

arch/x86/entry/entry_64.S

+2 −2
Original line number Diff line number Diff line
@@ -841,7 +841,7 @@ apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt 
/*

 * Exception entry points.

 */

#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss_rw) + (TSS_ist + ((x) - 1) * 8)

#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss_rw) + (TSS_ist + (x) * 8)



/**

 * idtentry - Generate an IDT entry stub
@@ -1129,7 +1129,7 @@ apicinterrupt3 HYPERV_STIMER0_VECTOR \ 
	hv_stimer0_callback_vector hv_stimer0_vector_handler

#endif /* CONFIG_HYPERV */



idtentry debug			do_debug		has_error_code=0	paranoid=1 shift_ist=DEBUG_STACK

idtentry debug			do_debug		has_error_code=0	paranoid=1 shift_ist=ESTACK_DB

idtentry int3			do_int3			has_error_code=0

idtentry stack_segment		do_stack_segment	has_error_code=1

arch/x86/include/asm/page_64_types.h

+8 −5
Original line number Diff line number Diff line
@@ -24,11 +24,14 @@ 
#define IRQ_STACK_ORDER (2 + KASAN_STACK_ORDER)

#define IRQ_STACK_SIZE (PAGE_SIZE << IRQ_STACK_ORDER)



#define DOUBLEFAULT_STACK 1

#define NMI_STACK 2

#define DEBUG_STACK 3

#define MCE_STACK 4

#define N_EXCEPTION_STACKS 4  /* hw limit: 7 */

/*

 * The index for the tss.ist[] array. The hardware limit is 7 entries.

 */

#define	ESTACK_DF		0

#define	ESTACK_NMI		1

#define	ESTACK_DB		2

#define	ESTACK_MCE		3

#define	N_EXCEPTION_STACKS	4



/*

 * Set __PAGE_OFFSET to the most negative possible address +

arch/x86/kernel/cpu/common.c

+2 −2
Original line number Diff line number Diff line
@@ -516,7 +516,7 @@ DEFINE_PER_CPU(struct cpu_entry_area *, cpu_entry_area); 
 */

static const unsigned int exception_stack_sizes[N_EXCEPTION_STACKS] = {

	  [0 ... N_EXCEPTION_STACKS - 1]	= EXCEPTION_STKSZ,

	  [DEBUG_STACK - 1]			= DEBUG_STKSZ

	  [ESTACK_DB]				= DEBUG_STKSZ

};

#endif
@@ -1760,7 +1760,7 @@ void cpu_init(void) 
			estacks += exception_stack_sizes[v];

			oist->ist[v] = t->x86_tss.ist[v] =

					(unsigned long)estacks;

			if (v == DEBUG_STACK-1)

			if (v == ESTACK_DB)

				per_cpu(debug_stack_addr, cpu) = (unsigned long)estacks;

		}

	}

arch/x86/kernel/dumpstack_64.c

+7 −7
Original line number Diff line number Diff line
@@ -18,16 +18,16 @@ 


#include <asm/stacktrace.h>



static char *exception_stack_names[N_EXCEPTION_STACKS] = {

		[ DOUBLEFAULT_STACK-1	]	= "#DF",

		[ NMI_STACK-1		]	= "NMI",

		[ DEBUG_STACK-1		]	= "#DB",

		[ MCE_STACK-1		]	= "#MC",

static const char *exception_stack_names[N_EXCEPTION_STACKS] = {

		[ ESTACK_DF	]	= "#DF",

		[ ESTACK_NMI	]	= "NMI",

		[ ESTACK_DB	]	= "#DB",

		[ ESTACK_MCE	]	= "#MC",

};



static unsigned long exception_stack_sizes[N_EXCEPTION_STACKS] = {

static const unsigned long exception_stack_sizes[N_EXCEPTION_STACKS] = {

	[0 ... N_EXCEPTION_STACKS - 1]		= EXCEPTION_STKSZ,

	[DEBUG_STACK - 1]			= DEBUG_STKSZ

	[ESTACK_DB]				= DEBUG_STKSZ

};



const char *stack_type_name(enum stack_type type)

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