Commit 8eb1f10e authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'qcom-dt-for-4.5' of... 

Merge tag 'qcom-dt-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt

Qualcomm ARM Based Device Tree Updates for v4.5

* Add support for Sony Xperia Z
* Updates for Sony Honami board
* Updates for APQ8064 generic platform
* Updates for MSM8974 generic platform
* Add fixed rate oscillators for MSM8960 and APQ8064
* Add documentation for SMSM and SMP2P
* Fixup PMIC compat strings
* Add support for SMEM, RPM/SMD on APQ8084
* Fixup compat on IFC5640

* tag 'qcom-dt-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux

: (24 commits)
  arm: dts: Add support for PMA8084 on APQ8084
  arm: dts: Add RPM/SMD support on APQ8084
  arm: dts: Add APQ8084 SMEM nodes
  ARM: dts: qcom: apq8064-ifc6410 Use hardware flow control for GSBI6
  arm: dts: qcom: apq8064: Add fixed rate on-board oscillators
  ARM: dts: qcom: msm8974: Add i2c8 node
  ARM: dts: qcom: msm8974: Disable wled and move it to honami
  arm: dts: qcom: Add generic PMIC gpio/MPP compat strings
  arm: dts: qcom: Add aliases for PMICs
  arm: dts: qcom: Update ifc6540 compat for qcom boot format
  arm: dts: qcom: Add board clocks
  ARM: dts: qcom: apq8064: Introduce Sony Xperia Z dts
  ARM: dts: qcom: apq8064: Introduce gsbi5 and gsbi5 serial node
  ARM: dts: qcom: apq8064: Declare all pm8921 regulators
  ARM: dts: qcom: apq8064: Add hwmutex and SMEM nodes
  dt-binding: soc: qcom: Introduce qcom, smp2p binding documentation
  dt-binding: soc: qcom: Add Qualcomm SMSM device tree documentation
  devicetree: Add hardware rng entry to qcom-apq8064.dtsi
  ARM: dts: qcom: msm8974-honami: Specify charging parameters
  ARM: dts: qcom: msm8974-honami: Add uSD slot nodes
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 960ac2db 4add1074

Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt

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+104 −0
Original line number Diff line number Diff line 
Qualcomm Shared Memory Point 2 Point binding



The Shared Memory Point to Point (SMP2P) protocol facilitates communication of

a single 32-bit value between two processors.  Each value has a single writer

(the local side) and a single reader (the remote side).  Values are uniquely

identified in the system by the directed edge (local processor ID to remote

processor ID) and a string identifier.



- compatible:

	Usage: required

	Value type: <string>

	Definition: must be one of:

		    "qcom,smp2p"



- interrupts:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: one entry specifying the smp2p notification interrupt



- qcom,ipc:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: three entries specifying the outgoing ipc bit used for

		    signaling the remote end of the smp2p edge:

		    - phandle to a syscon node representing the apcs registers

		    - u32 representing offset to the register within the syscon

		    - u32 representing the ipc bit within the register



- qcom,smem:

	Usage: required

	Value type: <u32 array>

	Definition: two identifiers of the inbound and outbound smem items used

		    for this edge



- qcom,local-pid:

	Usage: required

	Value type: <u32>

	Definition: specifies the identfier of the local endpoint of this edge



- qcom,remote-pid:

	Usage: required

	Value type: <u32>

	Definition: specifies the identfier of the remote endpoint of this edge



= SUBNODES

Each SMP2P pair contain a set of inbound and outbound entries, these are

described in subnodes of the smp2p device node. The node names are not

important.



- qcom,entry-name:

	Usage: required

	Value type: <string>

	Definition: specifies the name of this entry, for inbound entries this

		    will be used to match against the remotely allocated entry

		    and for outbound entries this name is used for allocating

		    entries



- interrupt-controller:

	Usage: required for incoming entries

	Value type: <empty>

	Definition: marks the entry as inbound; the node should be specified

		    as a two cell interrupt-controller as defined in

		    "../interrupt-controller/interrupts.txt"

		    If not specified this node will denote the outgoing entry



- #interrupt-cells:

	Usage: required for incoming entries

	Value type: <u32>

	Definition: must be 2 - denoting the bit in the entry and IRQ flags



- #qcom,state-cells:

	Usage: required for outgoing entries

	Value type: <u32>

	Definition: must be 1 - denoting the bit in the entry



= EXAMPLE

The following example shows the SMP2P setup with the wireless processor,

defined from the 8974 apps processor's point-of-view. It encompasses one

inbound and one outbound entry:



wcnss-smp2p {

	compatible = "qcom,smp2p";

	qcom,smem = <431>, <451>;



	interrupts = <0 143 1>;



	qcom,ipc = <&apcs 8 18>;



	qcom,local-pid = <0>;

	qcom,remote-pid = <4>;



	wcnss_smp2p_out: master-kernel {

		qcom,entry-name = "master-kernel";



		#qcom,state-cells = <1>;

	};



	wcnss_smp2p_in: slave-kernel {

		qcom,entry-name = "slave-kernel";



		interrupt-controller;

		#interrupt-cells = <2>;

	};

};

Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt

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+104 −0
Original line number Diff line number Diff line 
Qualcomm Shared Memory State Machine



The Shared Memory State Machine facilitates broadcasting of single bit state

information between the processors in a Qualcomm SoC. Each processor is

assigned 32 bits of state that can be modified. A processor can through a

matrix of bitmaps signal subscription of notifications upon changes to a

certain bit owned by a certain remote processor.



- compatible:

	Usage: required

	Value type: <string>

	Definition: must be one of:

		    "qcom,smsm"



- qcom,ipc-N:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: three entries specifying the outgoing ipc bit used for

		    signaling the N:th remote processor

		    - phandle to a syscon node representing the apcs registers

		    - u32 representing offset to the register within the syscon

		    - u32 representing the ipc bit within the register



- qcom,local-host:

	Usage: optional

	Value type: <u32>

	Definition: identifier of the local processor in the list of hosts, or

		    in other words specifier of the column in the subscription

		    matrix representing the local processor

		    defaults to host 0



- #address-cells:

	Usage: required

	Value type: <u32>

	Definition: must be 1



- #size-cells:

	Usage: required

	Value type: <u32>

	Definition: must be 0



= SUBNODES

Each processor's state bits are described by a subnode of the smsm device node.

Nodes can either be flagged as an interrupt-controller to denote a remote

processor's state bits or the local processors bits.  The node names are not

important.



- reg:

	Usage: required

	Value type: <u32>

	Definition: specifies the offset, in words, of the first bit for this

		    entry



- #qcom,state-cells:

	Usage: required for local entry

	Value type: <u32>

	Definition: must be 1 - denotes bit number



- interrupt-controller:

	Usage: required for remote entries

	Value type: <empty>

	Definition: marks the entry as a interrupt-controller and the state bits

		    to belong to a remote processor



- #interrupt-cells:

	Usage: required for remote entries

	Value type: <u32>

	Definition: must be 2 - denotes bit number and IRQ flags



- interrupts:

	Usage: required for remote entries

	Value type: <prop-encoded-array>

	Definition: one entry specifying remote IRQ used by the remote processor

		    to signal changes of its state bits





= EXAMPLE

The following example shows the SMEM setup for controlling properties of the

wireless processor, defined from the 8974 apps processor's point-of-view. It

encompasses one outbound entry and the outgoing interrupt for the wireless

processor.



smsm {

	compatible = "qcom,smsm";



	#address-cells = <1>;

	#size-cells = <0>;



	qcom,ipc-3 = <&apcs 8 19>;



	apps_smsm: apps@0 {

		reg = <0>;



		#qcom,state-cells = <1>;

	};



	wcnss_smsm: wcnss@7 {

		reg = <7>;

		interrupts = <0 144 1>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};

};

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -512,6 +512,7 @@ dtb-$(CONFIG_ARCH_PRIMA2) += \ 
dtb-$(CONFIG_ARCH_QCOM) += \

	qcom-apq8064-cm-qs600.dtb \

	qcom-apq8064-ifc6410.dtb \

	qcom-apq8064-sony-xperia-yuga.dtb \

	qcom-apq8074-dragonboard.dtb \

	qcom-apq8084-ifc6540.dtb \

	qcom-apq8084-mtp.dtb \

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts

+8 −8
Original line number Diff line number Diff line
@@ -54,7 +54,7 @@ 




				/* Buck SMPS */

				pm8921_s1: s1 {

				s1 {

					regulator-always-on;

					regulator-min-microvolt = <1225000>;

					regulator-max-microvolt = <1225000>;
@@ -62,43 +62,43 @@ 
					bias-pull-down;

				};



				pm8921_s3: s3 {

				s3 {

					regulator-min-microvolt = <1000000>;

					regulator-max-microvolt = <1400000>;

					qcom,switch-mode-frequency = <4800000>;

				};



				pm8921_s4: s4 {

				s4 {

					regulator-min-microvolt	= <1800000>;

					regulator-max-microvolt	= <1800000>;

					qcom,switch-mode-frequency = <3200000>;

				};



				pm8921_s7: s7 {

				s7 {

					regulator-min-microvolt = <1300000>;

					regulator-max-microvolt = <1300000>;

					qcom,switch-mode-frequency = <3200000>;

				};



				pm8921_l3: l3 {

				l3 {

					regulator-min-microvolt = <3050000>;

					regulator-max-microvolt = <3300000>;

					bias-pull-down;

				};



				pm8921_l4: l4 {

				l4 {

					regulator-min-microvolt = <1000000>;

					regulator-max-microvolt = <1800000>;

					bias-pull-down;

				};



				pm8921_l5: l5 {

				l5 {

					regulator-min-microvolt = <2750000>;

					regulator-max-microvolt = <3000000>;

					bias-pull-down;

				};



				pm8921_l23: l23 {

				l23 {

					regulator-min-microvolt = <1700000>;

					regulator-max-microvolt = <1900000>;

					bias-pull-down;

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts

+11 −11
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ 




				/* Buck SMPS */

				pm8921_s1: s1 {

				s1 {

					regulator-always-on;

					regulator-min-microvolt = <1225000>;

					regulator-max-microvolt = <1225000>;
@@ -72,55 +72,55 @@ 
					bias-pull-down;

				};



				pm8921_s3: s3 {

				s3 {

					regulator-min-microvolt = <1000000>;

					regulator-max-microvolt = <1400000>;

					qcom,switch-mode-frequency = <4800000>;

				};



				pm8921_s4: s4 {

				s4 {

					regulator-min-microvolt	= <1800000>;

					regulator-max-microvolt	= <1800000>;

					qcom,switch-mode-frequency = <3200000>;

				};



				pm8921_s7: s7 {

				s7 {

					regulator-min-microvolt = <1300000>;

					regulator-max-microvolt = <1300000>;

					qcom,switch-mode-frequency = <3200000>;

				};



				pm8921_l3: l3 {

				l3 {

					regulator-min-microvolt = <3050000>;

					regulator-max-microvolt = <3300000>;

					bias-pull-down;

				};



				pm8921_l4: l4 {

				l4 {

					regulator-min-microvolt = <1000000>;

					regulator-max-microvolt = <1800000>;

					bias-pull-down;

				};



				pm8921_l5: l5 {

				l5 {

					regulator-min-microvolt = <2750000>;

					regulator-max-microvolt = <3000000>;

					bias-pull-down;

				};



				pm8921_l6: l6 {

				l6 {

					regulator-min-microvolt = <2950000>;

					regulator-max-microvolt = <2950000>;

					bias-pull-down;

				};



				pm8921_l23: l23 {

				l23 {

					regulator-min-microvolt = <1700000>;

					regulator-max-microvolt = <1900000>;

					bias-pull-down;

				};



				pm8921_lvs1: lvs1 {

				lvs1 {

					bias-pull-down;

				};

			};
@@ -164,7 +164,7 @@ 


		gsbi@16500000 {

			status = "ok";

			qcom,mode = <GSBI_PROT_I2C_UART>;

			qcom,mode = <GSBI_PROT_UART_W_FC>;



			serial@16540000 {

				status = "ok";

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