Commit 8e9d645c authored by Gwan-gyeong Mun's avatar Gwan-gyeong Mun Committed by Jani Nikula
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drm/i915/dp: Add a config function for YCBCR420 outputs 



This patch checks a support of YCBCR420 outputs on an encoder level.
If the input mode is YCBCR420-only mode then it prepares DP as an YCBCR420
output, else it continues with RGB output mode.
It set output_format to INTEL_OUTPUT_FORMAT_YCBCR420 in order to using
a pipe scaler as RGB to YCbCr 4:4:4.

v2:
  Addressed review comments from Ville.
  Style fixed with few naming.
  %s/config/crtc_state/
  %s/intel_crtc/crtc/
  If lscon is active, it makes not to call intel_dp_ycbcr420_config()
  to avoid to clobber of lspcon_ycbcr420_config() routine.
  And it move the 420_only check into the intel_dp_ycbcr420_config().

v3: Fix uninitialized return value and it is reported by Dan Carpenter.

v4:
  Addressed review comments from Ville.
  In order to avoid the extra indentation, it inverts if-clause on
  intel_dp_ycbcr420_config().
  Remove the error print where no errors print are allowed.

v6: Rebase

v7:
  Move intel_dp_get_colorimetry_status() to intel_dp from intel_psr.
  intel_dp_get_colorimetry_status() checks
  VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the
  DPRX_FEATURE_ENUMERATION_LIST register.
  And intel_dp_ycbcr420_config() uses intel_dp_get_colorimetry_status().

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarGwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190521121721.32010-2-gwan-gyeong.mun@intel.com
parent c5d3e39c

drivers/gpu/drm/i915/intel_dp.c

+47 −1
Original line number Diff line number Diff line
@@ -2093,6 +2093,36 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, 
	return 0;

}



static int

intel_dp_ycbcr420_config(struct intel_dp *intel_dp,

			 struct drm_connector *connector,

			 struct intel_crtc_state *crtc_state)

{

	const struct drm_display_info *info = &connector->display_info;

	const struct drm_display_mode *adjusted_mode =

		&crtc_state->base.adjusted_mode;

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

	int ret;



	if (!drm_mode_is_420_only(info, adjusted_mode) ||

	    !intel_dp_get_colorimetry_status(intel_dp) ||

	    !connector->ycbcr_420_allowed)

		return 0;



	crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;



	/* YCBCR 420 output conversion needs a scaler */

	ret = skl_update_scaler_crtc(crtc_state);

	if (ret) {

		DRM_DEBUG_KMS("Scaler allocation for output failed\n");

		return ret;

	}



	intel_pch_panel_fitting(crtc, crtc_state, DRM_MODE_SCALE_FULLSCREEN);



	return 0;

}



bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,

				  const struct drm_connector_state *conn_state)

{
@@ -2132,7 +2162,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, 
		to_intel_digital_connector_state(conn_state);

	bool constant_n = drm_dp_has_quirk(&intel_dp->desc,

					   DP_DPCD_QUIRK_CONSTANT_N);

	int ret, output_bpp;

	int ret = 0, output_bpp;



	if (HAS_PCH_SPLIT(dev_priv) && !HAS_DDI(dev_priv) && port != PORT_A)

		pipe_config->has_pch_encoder = true;
@@ -2140,6 +2170,12 @@ intel_dp_compute_config(struct intel_encoder *encoder, 
	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;

	if (lspcon->active)

		lspcon_ycbcr420_config(&intel_connector->base, pipe_config);

	else

		ret = intel_dp_ycbcr420_config(intel_dp, &intel_connector->base,

					       pipe_config);



	if (ret)

		return ret;



	pipe_config->has_drrs = false;

	if (IS_G4X(dev_priv) || port == PORT_A)
@@ -4059,6 +4095,16 @@ intel_dp_read_dpcd(struct intel_dp *intel_dp) 
	return intel_dp->dpcd[DP_DPCD_REV] != 0;

}



bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp)

{

	u8 dprx = 0;



	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_DPRX_FEATURE_ENUMERATION_LIST,

			      &dprx) != 1)

		return false;

	return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED;

}



static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp)

{

	/*

drivers/gpu/drm/i915/intel_dp.h

+1 −0
Original line number Diff line number Diff line
@@ -108,6 +108,7 @@ u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp, int mode_clock, 
				int mode_hdisplay);



bool intel_dp_read_dpcd(struct intel_dp *intel_dp);

bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);

int intel_dp_link_required(int pixel_clock, int bpp);

int intel_dp_max_data_rate(int max_link_clock, int max_lanes);

bool intel_digital_port_connected(struct intel_encoder *encoder);

drivers/gpu/drm/i915/intel_psr.c

+0 −10
Original line number Diff line number Diff line
@@ -229,16 +229,6 @@ void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32 psr_iir) 
	}

}



static bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp)

{

	u8 dprx = 0;



	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_DPRX_FEATURE_ENUMERATION_LIST,

			      &dprx) != 1)

		return false;

	return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED;

}



static bool intel_dp_get_alpm_status(struct intel_dp *intel_dp)

{

	u8 alpm_caps = 0;

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