Commit 8e7c6a32 authored by Russell King's avatar Russell King Committed by Gregory CLEMENT
Browse files

ARM: dt: Add PMU node, making PMU child devices childs of this node 



Add the PMU node, and move the child devices of the PMU node beneath
this new node, giving it a "simple-bus" so that the OF platform
device creator will create these child devices.  No functional change
from this is expected.

The PMU provides multiple features, including an interrupt, reset,
power and isolation controller.

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent dc57844a

arch/arm/boot/dts/dove.dtsi

+304 −286
Original line number Diff line number Diff line
@@ -419,22 +419,37 @@ 
				status = "disabled";

			};



			thermal: thermal-diode@d001c {

			pmu: power-management@d0000 {

				compatible = "marvell,dove-pmu", "simple-bus";

				reg = <0xd0000 0x8000>, <0xd8000 0x8000>;

				ranges = <0x00000000 0x000d0000 0x8000

					  0x00008000 0x000d8000 0x8000>;

				interrupts = <33>;

				interrupt-controller;

				#address-cells = <1>;

				#size-cells = <1>;

				#interrupt-cells = <1>;

				#reset-cells = <1>;



				domains {

				};



				thermal: thermal-diode@001c {

					compatible = "marvell,dove-thermal";

				reg = <0xd001c 0x0c>, <0xd005c 0x08>;

					reg = <0x001c 0x0c>, <0x005c 0x08>;

				};



			gate_clk: clock-gating-ctrl@d0038 {

				gate_clk: clock-gating-ctrl@0038 {

					compatible = "marvell,dove-gating-clock";

				reg = <0xd0038 0x4>;

					reg = <0x0038 0x4>;

					clocks = <&core_clk 0>;

					#clock-cells = <1>;

				};



			pinctrl: pin-ctrl@d0200 {

				pinctrl: pin-ctrl@0200 {

					compatible = "marvell,dove-pinctrl";

				reg = <0xd0200 0x14>,

				      <0xd0440 0x04>;

					reg = <0x0200 0x14>,

					      <0x0440 0x04>;

					clocks = <&gate_clk 22>;



					pmx_gpio_0: pmx-gpio-0 {
@@ -675,37 +690,40 @@ 
					};

				};



			core_clk: core-clocks@d0214 {

				core_clk: core-clocks@0214 {

					compatible = "marvell,dove-core-clock";

				reg = <0xd0214 0x4>;

					reg = <0x0214 0x4>;

					#clock-cells = <1>;

				};



			gpio0: gpio-ctrl@d0400 {

				gpio0: gpio-ctrl@0400 {

					compatible = "marvell,orion-gpio";

					#gpio-cells = <2>;

					gpio-controller;

				reg = <0xd0400 0x20>;

					reg = <0x0400 0x20>;

					ngpios = <32>;

					interrupt-controller;

					#interrupt-cells = <2>;

					interrupt-parent = <&intc>;

					interrupts = <12>, <13>, <14>, <60>;

				};



			gpio1: gpio-ctrl@d0420 {

				gpio1: gpio-ctrl@0420 {

					compatible = "marvell,orion-gpio";

					#gpio-cells = <2>;

					gpio-controller;

				reg = <0xd0420 0x20>;

					reg = <0x0420 0x20>;

					ngpios = <32>;

					interrupt-controller;

					#interrupt-cells = <2>;

					interrupt-parent = <&intc>;

					interrupts = <61>;

				};



			rtc: real-time-clock@d8500 {

				rtc: real-time-clock@8500 {

					compatible = "marvell,orion-rtc";

				reg = <0xd8500 0x20>;

					reg = <0x8500 0x20>;

				};

			};



			gconf: global-config@e802c {

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