Commit 8e6f1521 authored by John Crispin's avatar John Crispin Committed by David S. Miller
Browse files

net: dsa: mediatek: add adjust link support for user ports 



Manually adjust the port settings of user ports once PHY polling has
completed. This patch extends the adjust_link callback to configure the
per port PMCR register, applying the proper values polled from the PHY.
Without this patch flow control was not always getting setup properly.

Signed-off-by: default avatarShashidhar Lakkavalli <shashidhar.lakkavalli@openmesh.com>
Signed-off-by: default avatarMuciri Gatimu <muciri@openmesh.com>
Signed-off-by: default avatarJohn Crispin <john@phrozen.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e718fe45

drivers/net/dsa/mt7530.c

+38 −0
Original line number Diff line number Diff line
@@ -625,6 +625,44 @@ static void mt7530_adjust_link(struct dsa_switch *ds, int port, 
		 * all finished.

		 */

		mt7623_pad_clk_setup(ds);

	} else {

		u16 lcl_adv = 0, rmt_adv = 0;

		u8 flowctrl;

		u32 mcr = PMCR_USERP_LINK | PMCR_FORCE_MODE;



		switch (phydev->speed) {

		case SPEED_1000:

			mcr |= PMCR_FORCE_SPEED_1000;

			break;

		case SPEED_100:

			mcr |= PMCR_FORCE_SPEED_100;

			break;

		};



		if (phydev->link)

			mcr |= PMCR_FORCE_LNK;



		if (phydev->duplex) {

			mcr |= PMCR_FORCE_FDX;



			if (phydev->pause)

				rmt_adv = LPA_PAUSE_CAP;

			if (phydev->asym_pause)

				rmt_adv |= LPA_PAUSE_ASYM;



			if (phydev->advertising & ADVERTISED_Pause)

				lcl_adv |= ADVERTISE_PAUSE_CAP;

			if (phydev->advertising & ADVERTISED_Asym_Pause)

				lcl_adv |= ADVERTISE_PAUSE_ASYM;



			flowctrl = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv);



			if (flowctrl & FLOW_CTRL_TX)

				mcr |= PMCR_TX_FC_EN;

			if (flowctrl & FLOW_CTRL_RX)

				mcr |= PMCR_RX_FC_EN;

		}

		mt7530_write(priv, MT7530_PMCR_P(port), mcr);

	}

}

drivers/net/dsa/mt7530.h

+1 −0
Original line number Diff line number Diff line
@@ -151,6 +151,7 @@ enum mt7530_stp_state { 
#define  PMCR_TX_FC_EN			BIT(5)

#define  PMCR_RX_FC_EN			BIT(4)

#define  PMCR_FORCE_SPEED_1000		BIT(3)

#define  PMCR_FORCE_SPEED_100		BIT(2)

#define  PMCR_FORCE_FDX			BIT(1)

#define  PMCR_FORCE_LNK			BIT(0)

#define  PMCR_COMMON_LINK		(PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | \

CRA Git | Maintained and supported by SUSTech CRA and CCSE