Commit 8e17a7f3 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'ux500-dt-for-v3.13-2' of... 

Merge tag 'ux500-dt-for-v3.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt

From Linus Walleij:
This is a huge device tree and ATAG removal series for ux500:
- Move all the clock definitions over to the device tree
- Remove all now-redundant AUXDATA and make the ux500 device
  tree only

* tag 'ux500-dt-for-v3.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson

: (92 commits)
  ARM: ux500: delete devices-common remnants
  clk: ux500: Provide a look-up for the ARMSS clock
  ARM: ux500: Enable CPUFreq on Snowball
  ARM: ux500: Provide a Device Tree node for CPUFreq in the DBx500
  ARM: ux500: Provide a clock lookup for the Hash driver
  ARM: ux500: Provide a clock lookup for the Crypto driver
  ARM: ux500: Fix trivial white-space error in the DBX500 DTSI file
  ARM: ux500: Remove ATAG booting support for Snowball
  ARM: ux500: Remove ATAG booting support for HREF
  ARM: ux500: Remove ATAG booting support for U8520
  ARM: ux500: Remove ATAG booting support for MOP500
  ARM: ux500: Purge UIB framework when booting with ATAGs
  ARM: ux500: Take out STUIB support when not booting with Device Tree
  ARM: ux500: Remove BU21013 ROHM TS support when booting with only ATAGs
  ARM: ux500: Don't register the STMPE/SKE when booting with ATAG support
  ARM: ux500: Delete U8500 UIB support when booting with ATAGs
  ARM: ux500: Don't register Synaptics RMI4 TS when booting with ATAGs
  ARM: ux500: Purge DB8500 PRCMU registration when not booting with DT
  ARM: ux500: Stop requesting the SoC device to play 'parent' role
  ARM: ux500: Remove UART support when booting without Device Tree
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 0ebf7dc4 c44c8e9d

Documentation/devicetree/bindings/usb/ux500-usb.txt

+1 −1
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ Optional properties: 
Example:



usb_per5@a03e0000 {

	compatible = "stericsson,db8500-musb", "mentor,musb";

	compatible = "stericsson,db8500-musb";

	reg = <0xa03e0000 0x10000>;

	interrupts = <0 23 0x4>;

	interrupt-names = "mc";

arch/arm/boot/dts/ste-dbx5x0.dtsi

+133 −8
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
 */



#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/mfd/dbx500-prcmu.h>

#include "skeleton.dtsi"



/ {
@@ -42,16 +43,56 @@ 
			interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;

		};





		clocks {

			compatible = "stericsson,u8500-clks";



			prcmu_clk: prcmu-clock {

				#clock-cells = <1>;

			};



			prcc_pclk: prcc-periph-clock {

				#clock-cells = <2>;

			};



			prcc_kclk: prcc-kernel-clock {

				#clock-cells = <2>;

			};



			rtc_clk: rtc32k-clock {

				#clock-cells = <0>;

			};



			smp_twd_clk: smp-twd-clock {

				#clock-cells = <0>;

			};

		};



		mtu@a03c6000 {

			/* Nomadik System Timer */

			compatible = "st,nomadik-mtu";

			reg = <0xa03c6000 0x1000>;

			interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;



			clocks = <&prcmu_clk PRCMU_TIMCLK>, <&prcc_pclk 6 6>;

			clock-names = "timclk", "apb_pclk";

		};



		timer@a0410600 {

			compatible = "arm,cortex-a9-twd-timer";

			reg = <0xa0410600 0x20>;

			interrupts = <1 13 0x304>; /* IRQ level high per-CPU */



			clocks = <&smp_twd_clk>;

		};



		rtc@80154000 {

			compatible = "arm,rtc-pl031", "arm,primecell";

			reg = <0x80154000 0x1000>;

			interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;



			clocks = <&rtc_clk>;

			clock-names = "apb_pclk";

		};



		gpio0: gpio@8012e000 {
@@ -65,6 +106,8 @@ 
			gpio-controller;

			#gpio-cells = <2>;

			gpio-bank = <0>;



			clocks = <&prcc_pclk 1 9>;

		};



		gpio1: gpio@8012e080 {
@@ -78,6 +121,8 @@ 
			gpio-controller;

			#gpio-cells = <2>;

			gpio-bank = <1>;



			clocks = <&prcc_pclk 1 9>;

		};



		gpio2: gpio@8000e000 {
@@ -91,6 +136,8 @@ 
			gpio-controller;

			#gpio-cells = <2>;

			gpio-bank = <2>;



			clocks = <&prcc_pclk 3 8>;

		};



		gpio3: gpio@8000e080 {
@@ -104,6 +151,8 @@ 
			gpio-controller;

			#gpio-cells = <2>;

			gpio-bank = <3>;



			clocks = <&prcc_pclk 3 8>;

		};



		gpio4: gpio@8000e100 {
@@ -117,6 +166,8 @@ 
			gpio-controller;

			#gpio-cells = <2>;

			gpio-bank = <4>;



			clocks = <&prcc_pclk 3 8>;

		};



		gpio5: gpio@8000e180 {
@@ -130,6 +181,8 @@ 
			gpio-controller;

			#gpio-cells = <2>;

			gpio-bank = <5>;



			clocks = <&prcc_pclk 3 8>;

		};



		gpio6: gpio@8011e000 {
@@ -143,6 +196,8 @@ 
			gpio-controller;

			#gpio-cells = <2>;

			gpio-bank = <6>;



			clocks = <&prcc_pclk 2 1>;

		};



		gpio7: gpio@8011e080 {
@@ -156,6 +211,8 @@ 
			gpio-controller;

			#gpio-cells = <2>;

			gpio-bank = <7>;



			clocks = <&prcc_pclk 2 1>;

		};



		gpio8: gpio@a03fe000 {
@@ -169,6 +226,8 @@ 
			gpio-controller;

			#gpio-cells = <2>;

			gpio-bank = <8>;



			clocks = <&prcc_pclk 6 1>;

		};



		pinctrl {
@@ -177,8 +236,7 @@ 
		};



		usb_per5@a03e0000 {

			compatible = "stericsson,db8500-musb",

				"mentor,musb";

			compatible = "stericsson,db8500-musb";

			reg = <0xa03e0000 0x10000>;

			interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "mc";
@@ -210,6 +268,8 @@ 
				    "iep_6_14", "oep_6_14",

				    "iep_7_15", "oep_7_15",

				    "iep_8",    "oep_8";



			clocks = <&prcc_pclk 5 0>;

		};



		dma: dma-controller@801C0000 {
@@ -220,6 +280,8 @@ 


			#dma-cells = <3>;

			memcpy-channels = <56 57 58 59 60>;



			clocks = <&prcmu_clk PRCMU_DMACLK>;

		};



		prcmu: prcmu@80157000 {
@@ -238,6 +300,13 @@ 
				reg = <0x80157450 0xC>;

			};



			cpufreq {

				compatible = "stericsson,cpufreq-ux500";

				clocks = <&prcmu_clk PRCMU_ARMSS>;

				clock-names = "armss";

				status = "disabled";

			};



			thermal@801573c0 {

				compatible = "stericsson,db8500-thermal";

				reg = <0x801573c0 0x40>;
@@ -559,65 +628,74 @@ 
			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";

			reg = <0x80004000 0x1000>;

			interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;

			arm,primecell-periphid = <0x180024>;



			#address-cells = <1>;

			#size-cells = <0>;

			v-i2c-supply = <&db8500_vape_reg>;



			clock-frequency = <400000>;

			clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>;

			clock-names = "i2cclk", "apb_pclk";

		};



		i2c@80122000 {

			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";

			reg = <0x80122000 0x1000>;

			interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;

			arm,primecell-periphid = <0x180024>;



			#address-cells = <1>;

			#size-cells = <0>;

			v-i2c-supply = <&db8500_vape_reg>;



			clock-frequency = <400000>;



			clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>;

			clock-names = "i2cclk", "apb_pclk";

		};



		i2c@80128000 {

			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";

			reg = <0x80128000 0x1000>;

			interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;

			arm,primecell-periphid = <0x180024>;



			#address-cells = <1>;

			#size-cells = <0>;

			v-i2c-supply = <&db8500_vape_reg>;



			clock-frequency = <400000>;



			clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>;

			clock-names = "i2cclk", "apb_pclk";

		};



		i2c@80110000 {

			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";

			reg = <0x80110000 0x1000>;

			interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>;

			arm,primecell-periphid = <0x180024>;



			#address-cells = <1>;

			#size-cells = <0>;

			v-i2c-supply = <&db8500_vape_reg>;



			clock-frequency = <400000>;



			clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>;

			clock-names = "i2cclk", "apb_pclk";

		};



		i2c@8012a000 {

			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";

			reg = <0x8012a000 0x1000>;

			interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;

			arm,primecell-periphid = <0x180024>;



			#address-cells = <1>;

			#size-cells = <0>;

			v-i2c-supply = <&db8500_vape_reg>;



			clock-frequency = <400000>;



			clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 9>;

			clock-names = "i2cclk", "apb_pclk";

		};



		ssp@80002000 {
@@ -638,6 +716,9 @@ 
			       <&dma 13 0 0x0>; /* Logical - MemToDev */

			dma-names = "rx", "tx";



			clocks = <&prcc_kclk 1 0>, <&prcc_pclk 1 0>;

			clock-names = "uart", "apb_pclk";



			status = "disabled";

		};
@@ -650,6 +731,9 @@ 
			       <&dma 12 0 0x0>; /* Logical - MemToDev */

			dma-names = "rx", "tx";



			clocks = <&prcc_kclk 1 1>, <&prcc_pclk 1 1>;

			clock-names = "uart", "apb_pclk";



			status = "disabled";

		};
@@ -662,6 +746,9 @@ 
			       <&dma 11 0 0x0>; /* Logical - MemToDev */

			dma-names = "rx", "tx";



			clocks = <&prcc_kclk 3 6>, <&prcc_pclk 3 6>;

			clock-names = "uart", "apb_pclk";



			status = "disabled";

		};
@@ -674,6 +761,9 @@ 
			       <&dma 29 0 0x0>; /* Logical - MemToDev */

			dma-names = "rx", "tx";



			clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>;

			clock-names = "sdi", "apb_pclk";



			status = "disabled";

		};
@@ -686,6 +776,9 @@ 
			       <&dma 32 0 0x0>; /* Logical - MemToDev */

			dma-names = "rx", "tx";



			clocks = <&prcc_kclk 2 4>, <&prcc_pclk 2 6>;

			clock-names = "sdi", "apb_pclk";



			status = "disabled";

		};
@@ -698,6 +791,9 @@ 
			       <&dma 28 0 0x0>; /* Logical - MemToDev */

			dma-names = "rx", "tx";



			clocks = <&prcc_kclk 3 4>, <&prcc_pclk 3 4>;

			clock-names = "sdi", "apb_pclk";



			status = "disabled";

		};
@@ -705,6 +801,10 @@ 
			compatible = "arm,pl18x", "arm,primecell";

			reg = <0x80119000 0x1000>;

			interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;



			clocks = <&prcc_kclk 2 5>, <&prcc_pclk 2 7>;

			clock-names = "sdi", "apb_pclk";



			status = "disabled";

		};
@@ -717,6 +817,9 @@ 
			       <&dma 42 0 0x0>; /* Logical - MemToDev */

			dma-names = "rx", "tx";



			clocks = <&prcc_kclk 2 2>, <&prcc_pclk 2 4>;

			clock-names = "sdi", "apb_pclk";



			status = "disabled";

		};
@@ -724,6 +827,10 @@ 
			compatible = "arm,pl18x", "arm,primecell";

			reg = <0x80008000 0x1000>;

			interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;



			clocks = <&prcc_kclk 3 7>, <&prcc_pclk 3 7>;

			clock-names = "sdi", "apb_pclk";



			status = "disabled";

		};
@@ -732,6 +839,10 @@ 
			reg = <0x80123000 0x1000>;

			interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;

			v-ape-supply = <&db8500_vape_reg>;



			clocks = <&prcc_kclk 1 3>, <&prcc_pclk 1 3>;

			clock-names = "msp", "apb_pclk";



			status = "disabled";

		};
@@ -740,6 +851,10 @@ 
			reg = <0x80124000 0x1000>;

			interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;

			v-ape-supply = <&db8500_vape_reg>;



			clocks = <&prcc_kclk 1 4>, <&prcc_pclk 1 4>;

			clock-names = "msp", "apb_pclk";



			status = "disabled";

		};
@@ -749,6 +864,10 @@ 
			reg = <0x80117000 0x1000>;

			interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;

			v-ape-supply = <&db8500_vape_reg>;



			clocks = <&prcc_kclk 2 3>, <&prcc_pclk 2 5>;

			clock-names = "msp", "apb_pclk";



			status = "disabled";

		};
@@ -757,6 +876,10 @@ 
			reg = <0x80125000 0x1000>;

			interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;

			v-ape-supply = <&db8500_vape_reg>;



			clocks = <&prcc_kclk 1 10>, <&prcc_pclk 1 11>;

			clock-names = "msp", "apb_pclk";



			status = "disabled";

		};
@@ -797,6 +920,7 @@ 
			interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;



			v-ape-supply = <&db8500_vape_reg>;

			clocks = <&prcc_pclk 6 1>;

		};



		hash@a03c2000 {
@@ -804,6 +928,7 @@ 
			reg = <0xa03c2000 0x1000>;



			v-ape-supply = <&db8500_vape_reg>;

			clocks = <&prcc_pclk 6 2>;

		};

	};

};

arch/arm/boot/dts/ste-href.dtsi

+0 −82
Original line number Diff line number Diff line
@@ -167,88 +167,6 @@ 
		};



		prcmu@80157000 {

			db8500-prcmu-regulators {

				db8500_vape_reg: db8500_vape {

					regulator-name = "db8500-vape";

				};



				db8500_varm_reg: db8500_varm {

					regulator-name = "db8500-varm";

				};



				db8500_vmodem_reg: db8500_vmodem {

					regulator-name = "db8500-vmodem";

				};



				db8500_vpll_reg: db8500_vpll {

					regulator-name = "db8500-vpll";

				};



				db8500_vsmps1_reg: db8500_vsmps1 {

					regulator-name = "db8500-vsmps1";

				};



				db8500_vsmps2_reg: db8500_vsmps2 {

					regulator-name = "db8500-vsmps2";

				};



				db8500_vsmps3_reg: db8500_vsmps3 {

					regulator-name = "db8500-vsmps3";

				};



				db8500_vrf1_reg: db8500_vrf1 {

					regulator-name = "db8500-vrf1";

				};



				db8500_sva_mmdsp_reg: db8500_sva_mmdsp {

					regulator-name = "db8500-sva-mmdsp";

				};



				db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {

					regulator-name = "db8500-sva-mmdsp-ret";

				};



				db8500_sva_pipe_reg: db8500_sva_pipe {

					regulator-name = "db8500_sva_pipe";

				};



				db8500_sia_mmdsp_reg: db8500_sia_mmdsp {

					regulator-name = "db8500_sia_mmdsp";

				};



				db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {

					regulator-name = "db8500-sia-mmdsp-ret";

				};



				db8500_sia_pipe_reg: db8500_sia_pipe {

					regulator-name = "db8500-sia-pipe";

				};



				db8500_sga_reg: db8500_sga {

					regulator-name = "db8500-sga";

				};



				db8500_b2r2_mcde_reg: db8500_b2r2_mcde {

					regulator-name = "db8500-b2r2-mcde";

				};



				db8500_esram12_reg: db8500_esram12 {

					regulator-name = "db8500-esram12";

				};



				db8500_esram12_ret_reg: db8500_esram12_ret {

					regulator-name = "db8500-esram12-ret";

				};



				db8500_esram34_reg: db8500_esram34 {

					regulator-name = "db8500-esram34";

				};



				db8500_esram34_ret_reg: db8500_esram34_ret {

					regulator-name = "db8500-esram34-ret";

				};

			};



			ab8500 {

				ab8500-regulators {

					ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {

arch/arm/boot/dts/ste-hrefv60plus.dts

+0 −132
Original line number Diff line number Diff line
@@ -74,137 +74,5 @@ 


			status = "okay";

		};



		prcmu@80157000 {

			db8500-prcmu-regulators {

				db8500_vape_reg: db8500_vape {

					regulator-name = "db8500-vape";

				};



				db8500_varm_reg: db8500_varm {

					regulator-name = "db8500-varm";

				};



				db8500_vmodem_reg: db8500_vmodem {

					regulator-name = "db8500-vmodem";

				};



				db8500_vpll_reg: db8500_vpll {

					regulator-name = "db8500-vpll";

				};



				db8500_vsmps1_reg: db8500_vsmps1 {

					regulator-name = "db8500-vsmps1";

				};



				db8500_vsmps2_reg: db8500_vsmps2 {

					regulator-name = "db8500-vsmps2";

				};



				db8500_vsmps3_reg: db8500_vsmps3 {

					regulator-name = "db8500-vsmps3";

				};



				db8500_vrf1_reg: db8500_vrf1 {

					regulator-name = "db8500-vrf1";

				};



				db8500_sva_mmdsp_reg: db8500_sva_mmdsp {

					regulator-name = "db8500-sva-mmdsp";

				};



				db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {

					regulator-name = "db8500-sva-mmdsp-ret";

				};



				db8500_sva_pipe_reg: db8500_sva_pipe {

					regulator-name = "db8500_sva_pipe";

				};



				db8500_sia_mmdsp_reg: db8500_sia_mmdsp {

					regulator-name = "db8500_sia_mmdsp";

				};



				db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {

					regulator-name = "db8500-sia-mmdsp-ret";

				};



				db8500_sia_pipe_reg: db8500_sia_pipe {

					regulator-name = "db8500-sia-pipe";

				};



				db8500_sga_reg: db8500_sga {

					regulator-name = "db8500-sga";

				};



				db8500_b2r2_mcde_reg: db8500_b2r2_mcde {

					regulator-name = "db8500-b2r2-mcde";

				};



				db8500_esram12_reg: db8500_esram12 {

					regulator-name = "db8500-esram12";

				};



				db8500_esram12_ret_reg: db8500_esram12_ret {

					regulator-name = "db8500-esram12-ret";

				};



				db8500_esram34_reg: db8500_esram34 {

					regulator-name = "db8500-esram34";

				};



				db8500_esram34_ret_reg: db8500_esram34_ret {

					regulator-name = "db8500-esram34-ret";

				};

			};



			ab8500 {

				ab8500-regulators {

					ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {

						regulator-name = "V-DISPLAY";

					};



					ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {

						regulator-name = "V-eMMC1";

					};



					ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {

						regulator-name = "V-MMC-SD";

					};



					ab8500_ldo_intcore_reg: ab8500_ldo_intcore {

						regulator-name = "V-INTCORE";

					};



					ab8500_ldo_tvout_reg: ab8500_ldo_tvout {

						regulator-name = "V-TVOUT";

					};



					ab8500_ldo_usb_reg: ab8500_ldo_usb {

						regulator-name = "dummy";

					};



					ab8500_ldo_audio_reg: ab8500_ldo_audio {

						regulator-name = "V-AUD";

					};



					ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {

						regulator-name = "V-AMIC1";

					};



					ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {

						regulator-name = "V-AMIC2";

					};



					ab8500_ldo_dmic_reg: ab8500_ldo_dmic {

						regulator-name = "V-DMIC";

					};



					ab8500_ldo_ana_reg: ab8500_ldo_ana {

						regulator-name = "V-CSI/DSI";

					};

				};

			};

		};

	};

};

arch/arm/boot/dts/ste-snowball.dts

+4 −81
Original line number Diff line number Diff line
@@ -111,12 +111,13 @@ 
				vdd33a-supply = <&en_3v3_reg>;

				vddvario-supply = <&db8500_vape_reg>;





				reg-shift = <1>;

				reg-io-width = <2>;

				smsc,force-internal-phy;

				smsc,irq-active-high;

				smsc,irq-push-pull;



				clocks = <&prcc_pclk 3 0>;

			};

		};
@@ -170,86 +171,8 @@ 
		};



		prcmu@80157000 {

			db8500-prcmu-regulators {

				db8500_vape_reg: db8500_vape {

					regulator-name = "db8500-vape";

				};



				db8500_varm_reg: db8500_varm {

					regulator-name = "db8500-varm";

				};



				db8500_vmodem_reg: db8500_vmodem {

					regulator-name = "db8500-vmodem";

				};



				db8500_vpll_reg: db8500_vpll {

					regulator-name = "db8500-vpll";

				};



				db8500_vsmps1_reg: db8500_vsmps1 {

					regulator-name = "db8500-vsmps1";

				};



				db8500_vsmps2_reg: db8500_vsmps2 {

					regulator-name = "db8500-vsmps2";

				};



				db8500_vsmps3_reg: db8500_vsmps3 {

					regulator-name = "db8500-vsmps3";

				};



				db8500_vrf1_reg: db8500_vrf1 {

					regulator-name = "db8500-vrf1";

				};



				db8500_sva_mmdsp_reg: db8500_sva_mmdsp {

					regulator-name = "db8500-sva-mmdsp";

				};



				db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {

					regulator-name = "db8500-sva-mmdsp-ret";

				};



				db8500_sva_pipe_reg: db8500_sva_pipe {

					regulator-name = "db8500_sva_pipe";

				};



				db8500_sia_mmdsp_reg: db8500_sia_mmdsp {

					regulator-name = "db8500_sia_mmdsp";

				};



				db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {

					regulator-name = "db8500-sia-mmdsp-ret";

				};



				db8500_sia_pipe_reg: db8500_sia_pipe {

					regulator-name = "db8500-sia-pipe";

				};



				db8500_sga_reg: db8500_sga {

					regulator-name = "db8500-sga";

				};



				db8500_b2r2_mcde_reg: db8500_b2r2_mcde {

					regulator-name = "db8500-b2r2-mcde";

				};



				db8500_esram12_reg: db8500_esram12 {

					regulator-name = "db8500-esram12";

				};



				db8500_esram12_ret_reg: db8500_esram12_ret {

					regulator-name = "db8500-esram12-ret";

				};



				db8500_esram34_reg: db8500_esram34 {

					regulator-name = "db8500-esram34";

				};



				db8500_esram34_ret_reg: db8500_esram34_ret {

					regulator-name = "db8500-esram34-ret";

				};

			cpufreq {

				status = "okay";

			};



			thermal@801573c0 {

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