Commit 8e0c819d authored by YueHaibing's avatar YueHaibing Committed by Alex Deucher
Browse files

drm/amd/dc: remove unused variable 'video_optimized_pixel_rates' 



drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:1017:50:
 warning: ‘video_optimized_pixel_rates’ defined but not used [-Wunused-const-variable=]
 static const struct pixel_rate_range_table_entry video_optimized_pixel_rates[] = {
                                                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~

commit d8cd587d ("drm/amd/display: removing MODULO change for dcn2")
left behind this unused vairable, remove it.

Signed-off-by: default avatarYueHaibing <yuehaibing@huawei.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1470e957

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

+0 −33
Original line number Diff line number Diff line
@@ -1014,39 +1014,6 @@ struct pixel_rate_range_table_entry { 
	unsigned short div_factor;

};



static const struct pixel_rate_range_table_entry video_optimized_pixel_rates[] = {

	// /1.001 rates

	{25170, 25180, 25200, 1000, 1001},	//25.2MHz   ->   25.17

	{59340, 59350, 59400, 1000, 1001},	//59.4Mhz   ->   59.340

	{74170, 74180, 74250, 1000, 1001},	//74.25Mhz  ->   74.1758

	{125870, 125880, 126000, 1000, 1001},	//126Mhz    ->  125.87

	{148350, 148360, 148500, 1000, 1001},	//148.5Mhz  ->  148.3516

	{167830, 167840, 168000, 1000, 1001},	//168Mhz    ->  167.83

	{222520, 222530, 222750, 1000, 1001},	//222.75Mhz ->  222.527

	{257140, 257150, 257400, 1000, 1001},	//257.4Mhz  ->  257.1429

	{296700, 296710, 297000, 1000, 1001},	//297Mhz    ->  296.7033

	{342850, 342860, 343200, 1000, 1001},	//343.2Mhz  ->  342.857

	{395600, 395610, 396000, 1000, 1001},	//396Mhz    ->  395.6

	{409090, 409100, 409500, 1000, 1001},	//409.5Mhz  ->  409.091

	{445050, 445060, 445500, 1000, 1001},	//445.5Mhz  ->  445.055

	{467530, 467540, 468000, 1000, 1001},	//468Mhz    ->  467.5325

	{519230, 519240, 519750, 1000, 1001},	//519.75Mhz ->  519.231

	{525970, 525980, 526500, 1000, 1001},	//526.5Mhz  ->  525.974

	{545450, 545460, 546000, 1000, 1001},	//546Mhz    ->  545.455

	{593400, 593410, 594000, 1000, 1001},	//594Mhz    ->  593.4066

	{623370, 623380, 624000, 1000, 1001},	//624Mhz    ->  623.377

	{692300, 692310, 693000, 1000, 1001},	//693Mhz    ->  692.308

	{701290, 701300, 702000, 1000, 1001},	//702Mhz    ->  701.2987

	{791200, 791210, 792000, 1000, 1001},	//792Mhz    ->  791.209

	{890100, 890110, 891000, 1000, 1001},	//891Mhz    ->  890.1099

	{1186810, 1186820, 1188000, 1000, 1001},//1188Mhz   -> 1186.8131



	// *1.001 rates

	{27020, 27030, 27000, 1001, 1000}, //27Mhz

	{54050, 54060, 54000, 1001, 1000}, //54Mhz

	{108100, 108110, 108000, 1001, 1000},//108Mhz

};



static bool dcn20_program_pix_clk(

		struct clock_source *clock_source,

		struct pixel_clk_params *pix_clk_params,

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