Commit 8dc0aac1 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'drivers_soc_for_5.11' of... 

Merge tag 'drivers_soc_for_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers

drivers: soc: TI SOC changes for 5.11

- ti_sci changes towards DMSS support
- Static warning fixes
- Kconfig update for Keystone ARM64 socs
- AM64X SOC family support

* tag 'drivers_soc_for_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (23 commits)
  drivers: soc: ti: knav_qmss_queue: Fix error return code in knav_queue_probe
  soc: ti: Fix reference imbalance in knav_dma_probe
  soc: ti: pruss: Remove wrong check against *get_match_data return value
  soc: ti: Kconfig: Drop ARM64 SoC specific configs
  soc: ti: k3-ringacc: Provide documentation for 'k3_ring's 'state'
  soc: ti: wkup_m3_ipc: Document 'm3_ipc' parameter throughout
  soc: ti: pm33xx: Remove set but unused variable 'ret'
  soc: ti: knav_dma: Fix a kernel function doc formatting issue
  soc: ti: knav_qmss_queue: Fix a whole host of function documentation issues
  soc: ti: knav_qmss_queue: Remove set but unchecked variable 'ret'
  soc: ti: omap-prm: Do not check rstst bit on deassert if already deasserted
  soc: ti: knav_qmss: fix reference leak in knav_queue_probe
  soc: ti: k3-socinfo: Add entry for AM64X SoC family
  soc: ti: k3-ringacc: Use correct device for allocation in RING mode
  firmware: ti_sci: rm: Remove unused config() from ti_sci_rm_ringacc_ops
  soc: ti: k3-ringacc: Use the ti_sci set_cfg callback for ring configuration
  firmware: ti_sci: rm: Add new ops for ring configuration
  firmware: ti_sci: rm: Remove ring_get_config support
  firmware: ti_sci: rm: Add support for extended_ch_type for tx channel
  soc: ti: ti_sci_inta_msi: Add support for second range in resource ranges
  ...

Link: https://lore.kernel.org/r/1606851405-26338-1-git-send-email-santosh.shilimkar@oracle.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 4cc6ae98 4cba398f

drivers/firmware/ti_sci.c

+69 −144
Original line number Diff line number Diff line
@@ -1703,14 +1703,14 @@ fail: 
 * @subtype:		Resource assignment subtype that is being requested

 *			from the given device.

 * @s_host:		Host processor ID to which the resources are allocated

 * @range_start:	Start index of the resource range

 * @range_num:		Number of resources in the range

 * @desc:		Pointer to ti_sci_resource_desc to be updated with the

 *			resource range start index and number of resources

 *

 * Return: 0 if all went fine, else return appropriate error.

 */

static int ti_sci_get_resource_range(const struct ti_sci_handle *handle,

				     u32 dev_id, u8 subtype, u8 s_host,

				     u16 *range_start, u16 *range_num)

				     struct ti_sci_resource_desc *desc)

{

	struct ti_sci_msg_resp_get_resource_range *resp;

	struct ti_sci_msg_req_get_resource_range *req;
@@ -1721,7 +1721,7 @@ static int ti_sci_get_resource_range(const struct ti_sci_handle *handle, 


	if (IS_ERR(handle))

		return PTR_ERR(handle);

	if (!handle)

	if (!handle || !desc)

		return -EINVAL;



	info = handle_to_ti_sci_info(handle);
@@ -1751,11 +1751,14 @@ static int ti_sci_get_resource_range(const struct ti_sci_handle *handle, 


	if (!ti_sci_is_response_ack(resp)) {

		ret = -ENODEV;

	} else if (!resp->range_start && !resp->range_num) {

	} else if (!resp->range_num && !resp->range_num_sec) {

		/* Neither of the two resource range is valid */

		ret = -ENODEV;

	} else {

		*range_start = resp->range_start;

		*range_num = resp->range_num;

		desc->start = resp->range_start;

		desc->num = resp->range_num;

		desc->start_sec = resp->range_start_sec;

		desc->num_sec = resp->range_num_sec;

	};



fail:
@@ -1771,18 +1774,18 @@ fail: 
 * @dev_id:		TISCI device ID.

 * @subtype:		Resource assignment subtype that is being requested

 *			from the given device.

 * @range_start:	Start index of the resource range

 * @range_num:		Number of resources in the range

 * @desc:		Pointer to ti_sci_resource_desc to be updated with the

 *			resource range start index and number of resources

 *

 * Return: 0 if all went fine, else return appropriate error.

 */

static int ti_sci_cmd_get_resource_range(const struct ti_sci_handle *handle,

					 u32 dev_id, u8 subtype,

					 u16 *range_start, u16 *range_num)

					 struct ti_sci_resource_desc *desc)

{

	return ti_sci_get_resource_range(handle, dev_id, subtype,

					 TI_SCI_IRQ_SECONDARY_HOST_INVALID,

					 range_start, range_num);

					 desc);

}



/**
@@ -1793,18 +1796,17 @@ static int ti_sci_cmd_get_resource_range(const struct ti_sci_handle *handle, 
 * @subtype:		Resource assignment subtype that is being requested

 *			from the given device.

 * @s_host:		Host processor ID to which the resources are allocated

 * @range_start:	Start index of the resource range

 * @range_num:		Number of resources in the range

 * @desc:		Pointer to ti_sci_resource_desc to be updated with the

 *			resource range start index and number of resources

 *

 * Return: 0 if all went fine, else return appropriate error.

 */

static

int ti_sci_cmd_get_resource_range_from_shost(const struct ti_sci_handle *handle,

					     u32 dev_id, u8 subtype, u8 s_host,

					     u16 *range_start, u16 *range_num)

					     struct ti_sci_resource_desc *desc)

{

	return ti_sci_get_resource_range(handle, dev_id, subtype, s_host,

					 range_start, range_num);

	return ti_sci_get_resource_range(handle, dev_id, subtype, s_host, desc);

}



/**
@@ -2047,28 +2049,17 @@ static int ti_sci_cmd_free_event_map(const struct ti_sci_handle *handle, 
}



/**

 * ti_sci_cmd_ring_config() - configure RA ring

 * ti_sci_cmd_rm_ring_cfg() - Configure a NAVSS ring

 * @handle:	Pointer to TI SCI handle.

 * @valid_params:	Bitfield defining validity of ring configuration

 *			parameters

 * @nav_id:		Device ID of Navigator Subsystem from which the ring is

 *			allocated

 * @index:		Ring index

 * @addr_lo:		The ring base address lo 32 bits

 * @addr_hi:		The ring base address hi 32 bits

 * @count:		Number of ring elements

 * @mode:		The mode of the ring

 * @size:		The ring element size.

 * @order_id:		Specifies the ring's bus order ID

 * @params:	Pointer to ti_sci_msg_rm_ring_cfg ring config structure

 *

 * Return: 0 if all went well, else returns appropriate error value.

 *

 * See @ti_sci_msg_rm_ring_cfg_req for more info.

 * See @ti_sci_msg_rm_ring_cfg and @ti_sci_msg_rm_ring_cfg_req for

 * more info.

 */

static int ti_sci_cmd_ring_config(const struct ti_sci_handle *handle,

				  u32 valid_params, u16 nav_id, u16 index,

				  u32 addr_lo, u32 addr_hi, u32 count,

				  u8 mode, u8 size, u8 order_id)

static int ti_sci_cmd_rm_ring_cfg(const struct ti_sci_handle *handle,

				  const struct ti_sci_msg_rm_ring_cfg *params)

{

	struct ti_sci_msg_rm_ring_cfg_req *req;

	struct ti_sci_msg_hdr *resp;
@@ -2092,15 +2083,17 @@ static int ti_sci_cmd_ring_config(const struct ti_sci_handle *handle, 
		return ret;

	}

	req = (struct ti_sci_msg_rm_ring_cfg_req *)xfer->xfer_buf;

	req->valid_params = valid_params;

	req->nav_id = nav_id;

	req->index = index;

	req->addr_lo = addr_lo;

	req->addr_hi = addr_hi;

	req->count = count;

	req->mode = mode;

	req->size = size;

	req->order_id = order_id;

	req->valid_params = params->valid_params;

	req->nav_id = params->nav_id;

	req->index = params->index;

	req->addr_lo = params->addr_lo;

	req->addr_hi = params->addr_hi;

	req->count = params->count;

	req->mode = params->mode;

	req->size = params->size;

	req->order_id = params->order_id;

	req->virtid = params->virtid;

	req->asel = params->asel;



	ret = ti_sci_do_xfer(info, xfer);

	if (ret) {
@@ -2109,90 +2102,11 @@ static int ti_sci_cmd_ring_config(const struct ti_sci_handle *handle, 
	}



	resp = (struct ti_sci_msg_hdr *)xfer->xfer_buf;

	ret = ti_sci_is_response_ack(resp) ? 0 : -ENODEV;



fail:

	ti_sci_put_one_xfer(&info->minfo, xfer);

	dev_dbg(dev, "RM_RA:config ring %u ret:%d\n", index, ret);

	return ret;

}



/**

 * ti_sci_cmd_ring_get_config() - get RA ring configuration

 * @handle:	Pointer to TI SCI handle.

 * @nav_id:	Device ID of Navigator Subsystem from which the ring is

 *		allocated

 * @index:	Ring index

 * @addr_lo:	Returns ring's base address lo 32 bits

 * @addr_hi:	Returns ring's base address hi 32 bits

 * @count:	Returns number of ring elements

 * @mode:	Returns mode of the ring

 * @size:	Returns ring element size

 * @order_id:	Returns ring's bus order ID

 *

 * Return: 0 if all went well, else returns appropriate error value.

 *

 * See @ti_sci_msg_rm_ring_get_cfg_req for more info.

 */

static int ti_sci_cmd_ring_get_config(const struct ti_sci_handle *handle,

				      u32 nav_id, u32 index, u8 *mode,

				      u32 *addr_lo, u32 *addr_hi,

				      u32 *count, u8 *size, u8 *order_id)

{

	struct ti_sci_msg_rm_ring_get_cfg_resp *resp;

	struct ti_sci_msg_rm_ring_get_cfg_req *req;

	struct ti_sci_xfer *xfer;

	struct ti_sci_info *info;

	struct device *dev;

	int ret = 0;



	if (IS_ERR_OR_NULL(handle))

		return -EINVAL;



	info = handle_to_ti_sci_info(handle);

	dev = info->dev;



	xfer = ti_sci_get_one_xfer(info, TI_SCI_MSG_RM_RING_GET_CFG,

				   TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,

				   sizeof(*req), sizeof(*resp));

	if (IS_ERR(xfer)) {

		ret = PTR_ERR(xfer);

		dev_err(dev,

			"RM_RA:Message get config failed(%d)\n", ret);

		return ret;

	}

	req = (struct ti_sci_msg_rm_ring_get_cfg_req *)xfer->xfer_buf;

	req->nav_id = nav_id;

	req->index = index;



	ret = ti_sci_do_xfer(info, xfer);

	if (ret) {

		dev_err(dev, "RM_RA:Mbox get config send fail %d\n", ret);

		goto fail;

	}



	resp = (struct ti_sci_msg_rm_ring_get_cfg_resp *)xfer->xfer_buf;



	if (!ti_sci_is_response_ack(resp)) {

		ret = -ENODEV;

	} else {

		if (mode)

			*mode = resp->mode;

		if (addr_lo)

			*addr_lo = resp->addr_lo;

		if (addr_hi)

			*addr_hi = resp->addr_hi;

		if (count)

			*count = resp->count;

		if (size)

			*size = resp->size;

		if (order_id)

			*order_id = resp->order_id;

	};

	ret = ti_sci_is_response_ack(resp) ? 0 : -EINVAL;



fail:

	ti_sci_put_one_xfer(&info->minfo, xfer);

	dev_dbg(dev, "RM_RA:get config ring %u ret:%d\n", index, ret);

	dev_dbg(dev, "RM_RA:config ring %u ret:%d\n", params->index, ret);

	return ret;

}
@@ -2362,6 +2276,8 @@ static int ti_sci_cmd_rm_udmap_tx_ch_cfg(const struct ti_sci_handle *handle, 
	req->fdepth = params->fdepth;

	req->tx_sched_priority = params->tx_sched_priority;

	req->tx_burst_size = params->tx_burst_size;

	req->tx_tdtype = params->tx_tdtype;

	req->extended_ch_type = params->extended_ch_type;



	ret = ti_sci_do_xfer(info, xfer);

	if (ret) {
@@ -2921,8 +2837,7 @@ static void ti_sci_setup_ops(struct ti_sci_info *info) 
	iops->free_irq = ti_sci_cmd_free_irq;

	iops->free_event_map = ti_sci_cmd_free_event_map;



	rops->config = ti_sci_cmd_ring_config;

	rops->get_config = ti_sci_cmd_ring_get_config;

	rops->set_cfg = ti_sci_cmd_rm_ring_cfg;



	psilops->pair = ti_sci_cmd_rm_psil_pair;

	psilops->unpair = ti_sci_cmd_rm_psil_unpair;
@@ -3157,12 +3072,18 @@ u16 ti_sci_get_free_resource(struct ti_sci_resource *res) 


	raw_spin_lock_irqsave(&res->lock, flags);

	for (set = 0; set < res->sets; set++) {

		free_bit = find_first_zero_bit(res->desc[set].res_map,

					       res->desc[set].num);

		if (free_bit != res->desc[set].num) {

			set_bit(free_bit, res->desc[set].res_map);

		struct ti_sci_resource_desc *desc = &res->desc[set];

		int res_count = desc->num + desc->num_sec;



		free_bit = find_first_zero_bit(desc->res_map, res_count);

		if (free_bit != res_count) {

			set_bit(free_bit, desc->res_map);

			raw_spin_unlock_irqrestore(&res->lock, flags);

			return res->desc[set].start + free_bit;



			if (desc->num && free_bit < desc->num)

				return desc->start + free_bit;

			else

				return desc->start_sec + free_bit;

		}

	}

	raw_spin_unlock_irqrestore(&res->lock, flags);
@@ -3183,10 +3104,14 @@ void ti_sci_release_resource(struct ti_sci_resource *res, u16 id) 


	raw_spin_lock_irqsave(&res->lock, flags);

	for (set = 0; set < res->sets; set++) {

		if (res->desc[set].start <= id &&

		    (res->desc[set].num + res->desc[set].start) > id)

			clear_bit(id - res->desc[set].start,

				  res->desc[set].res_map);

		struct ti_sci_resource_desc *desc = &res->desc[set];



		if (desc->num && desc->start <= id &&

		    (desc->start + desc->num) > id)

			clear_bit(id - desc->start, desc->res_map);

		else if (desc->num_sec && desc->start_sec <= id &&

			 (desc->start_sec + desc->num_sec) > id)

			clear_bit(id - desc->start_sec, desc->res_map);

	}

	raw_spin_unlock_irqrestore(&res->lock, flags);

}
@@ -3203,7 +3128,7 @@ u32 ti_sci_get_num_resources(struct ti_sci_resource *res) 
	u32 set, count = 0;



	for (set = 0; set < res->sets; set++)

		count += res->desc[set].num;

		count += res->desc[set].num + res->desc[set].num_sec;



	return count;

}
@@ -3227,7 +3152,7 @@ devm_ti_sci_get_resource_sets(const struct ti_sci_handle *handle, 
{

	struct ti_sci_resource *res;

	bool valid_set = false;

	int i, ret;

	int i, ret, res_count;



	res = devm_kzalloc(dev, sizeof(*res), GFP_KERNEL);

	if (!res)
@@ -3242,23 +3167,23 @@ devm_ti_sci_get_resource_sets(const struct ti_sci_handle *handle, 
	for (i = 0; i < res->sets; i++) {

		ret = handle->ops.rm_core_ops.get_range(handle, dev_id,

							sub_types[i],

							&res->desc[i].start,

							&res->desc[i].num);

							&res->desc[i]);

		if (ret) {

			dev_dbg(dev, "dev = %d subtype %d not allocated for this host\n",

				dev_id, sub_types[i]);

			res->desc[i].start = 0;

			res->desc[i].num = 0;

			memset(&res->desc[i], 0, sizeof(res->desc[i]));

			continue;

		}



		dev_dbg(dev, "dev = %d, subtype = %d, start = %d, num = %d\n",

		dev_dbg(dev, "dev/sub_type: %d/%d, start/num: %d/%d | %d/%d\n",

			dev_id, sub_types[i], res->desc[i].start,

			res->desc[i].num);

			res->desc[i].num, res->desc[i].start_sec,

			res->desc[i].num_sec);



		valid_set = true;

		res_count = res->desc[i].num + res->desc[i].num_sec;

		res->desc[i].res_map =

			devm_kzalloc(dev, BITS_TO_LONGS(res->desc[i].num) *

			devm_kzalloc(dev, BITS_TO_LONGS(res_count) *

				     sizeof(*res->desc[i].res_map), GFP_KERNEL);

		if (!res->desc[i].res_map)

			return ERR_PTR(-ENOMEM);

drivers/firmware/ti_sci.h

+26 −46
Original line number Diff line number Diff line
@@ -49,7 +49,6 @@ 
#define TI_SCI_MSG_RM_RING_RECONFIG		0x1102

#define TI_SCI_MSG_RM_RING_RESET		0x1103

#define TI_SCI_MSG_RM_RING_CFG			0x1110

#define TI_SCI_MSG_RM_RING_GET_CFG		0x1111



/* PSI-L requests */

#define TI_SCI_MSG_RM_PSIL_PAIR			0x1280
@@ -574,8 +573,10 @@ struct ti_sci_msg_req_get_resource_range { 
/**

 * struct ti_sci_msg_resp_get_resource_range - Response to resource get range.

 * @hdr:		Generic Header

 * @range_start:	Start index of the resource range.

 * @range_num:		Number of resources in the range.

 * @range_start:	Start index of the first resource range.

 * @range_num:		Number of resources in the first range.

 * @range_start_sec:	Start index of the second resource range.

 * @range_num_sec:	Number of resources in the second range.

 *

 * Response to request TI_SCI_MSG_GET_RESOURCE_RANGE.

 */
@@ -583,6 +584,8 @@ struct ti_sci_msg_resp_get_resource_range { 
	struct ti_sci_msg_hdr hdr;

	u16 range_start;

	u16 range_num;

	u16 range_start_sec;

	u16 range_num_sec;

} __packed;



/**
@@ -656,6 +659,8 @@ struct ti_sci_msg_req_manage_irq { 
 *	3 - Valid bit for @tisci_msg_rm_ring_cfg_req mode

 *	4 - Valid bit for @tisci_msg_rm_ring_cfg_req size

 *	5 - Valid bit for @tisci_msg_rm_ring_cfg_req order_id

 *	6 - Valid bit for @tisci_msg_rm_ring_cfg_req virtid

 *	7 - Valid bit for @tisci_msg_rm_ring_cfg_req ASEL

 * @nav_id: Device ID of Navigator Subsystem from which the ring is allocated

 * @index: ring index to be configured.

 * @addr_lo: 32 LSBs of ring base address to be programmed into the ring's
@@ -669,6 +674,9 @@ struct ti_sci_msg_req_manage_irq { 
 *	the formula (log2(size_bytes) - 2), where size_bytes cannot be

 *	greater than 256.

 * @order_id: Specifies the ring's bus order ID.

 * @virtid: Ring virt ID value

 * @asel: Ring ASEL (address select) value to be set into the ASEL field of the

 *	ring's RING_BA_HI register.

 */

struct ti_sci_msg_rm_ring_cfg_req {

	struct ti_sci_msg_hdr hdr;
@@ -681,49 +689,8 @@ struct ti_sci_msg_rm_ring_cfg_req { 
	u8 mode;

	u8 size;

	u8 order_id;

} __packed;



/**

 * struct ti_sci_msg_rm_ring_get_cfg_req - Get RA ring's configuration

 *

 * Gets the configuration of the non-real-time register fields of a ring.  The

 * host, or a supervisor of the host, who owns the ring must be the requesting

 * host.  The values of the non-real-time registers are returned in

 * @ti_sci_msg_rm_ring_get_cfg_resp.

 *

 * @hdr: Generic Header

 * @nav_id: Device ID of Navigator Subsystem from which the ring is allocated

 * @index: ring index.

 */

struct ti_sci_msg_rm_ring_get_cfg_req {

	struct ti_sci_msg_hdr hdr;

	u16 nav_id;

	u16 index;

} __packed;



/**

 * struct ti_sci_msg_rm_ring_get_cfg_resp -  Ring get configuration response

 *

 * Response received by host processor after RM has handled

 * @ti_sci_msg_rm_ring_get_cfg_req. The response contains the ring's

 * non-real-time register values.

 *

 * @hdr: Generic Header

 * @addr_lo: Ring 32 LSBs of base address

 * @addr_hi: Ring 16 MSBs of base address.

 * @count: Ring number of elements.

 * @mode: Ring mode.

 * @size: encoded Ring element size

 * @order_id: ing order ID.

 */

struct ti_sci_msg_rm_ring_get_cfg_resp {

	struct ti_sci_msg_hdr hdr;

	u32 addr_lo;

	u32 addr_hi;

	u32 count;

	u8 mode;

	u8 size;

	u8 order_id;

	u16 virtid;

	u8 asel;

} __packed;



/**
@@ -910,6 +877,8 @@ struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg { 
 *   12 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_credit_count

 *   13 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::fdepth

 *   14 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_burst_size

 *   15 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_tdtype

 *   16 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::extended_ch_type

 *

 * @nav_id: SoC device ID of Navigator Subsystem where tx channel is located

 *
@@ -973,6 +942,15 @@ struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg { 
 *

 * @tx_burst_size: UDMAP transmit channel burst size configuration to be

 * programmed into the tx_burst_size field of the TCHAN_TCFG register.

 *

 * @tx_tdtype: UDMAP transmit channel teardown type configuration to be

 * programmed into the tdtype field of the TCHAN_TCFG register:

 * 0 - Return immediately

 * 1 - Wait for completion message from remote peer

 *

 * @extended_ch_type: Valid for BCDMA.

 * 0 - the channel is split tx channel (tchan)

 * 1 - the channel is block copy channel (bchan)

 */

struct ti_sci_msg_rm_udmap_tx_ch_cfg_req {

	struct ti_sci_msg_hdr hdr;
@@ -994,6 +972,8 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg_req { 
	u16 fdepth;

	u8 tx_sched_priority;

	u8 tx_burst_size;

	u8 tx_tdtype;

	u8 extended_ch_type;

} __packed;



/**

drivers/soc/ti/Kconfig

+0 −18
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0-only

# 64-bit ARM SoCs from TI

if ARM64



if ARCH_K3



config ARCH_K3_AM6_SOC

	bool "K3 AM6 SoC"

	help

	  Enable support for TI's AM6 SoC Family support



config ARCH_K3_J721E_SOC

	bool "K3 J721E SoC"

	help

	  Enable support for TI's J721E SoC Family support



endif



endif



#

# TI SOC drivers

drivers/soc/ti/k3-ringacc.c

+46 −52
Original line number Diff line number Diff line
@@ -137,10 +137,12 @@ struct k3_ring_state { 
 * @elm_size: Size of the ring element

 * @mode: Ring mode

 * @flags: flags

 * @state: Ring state

 * @ring_id: Ring Id

 * @parent: Pointer on struct @k3_ringacc

 * @use_count: Use count for shared rings

 * @proxy_id: RA Ring Proxy Id (only if @K3_RINGACC_RING_USE_PROXY)

 * @dma_dev: device to be used for DMA API (allocation, mapping)

 */

struct k3_ring {

	struct k3_ring_rt_regs __iomem *rt;
@@ -160,6 +162,7 @@ struct k3_ring { 
	struct k3_ringacc	*parent;

	u32		use_count;

	int		proxy_id;

	struct device	*dma_dev;

};



struct k3_ringacc_ops {
@@ -365,20 +368,16 @@ EXPORT_SYMBOL_GPL(k3_ringacc_request_rings_pair); 


static void k3_ringacc_ring_reset_sci(struct k3_ring *ring)

{

	struct ti_sci_msg_rm_ring_cfg ring_cfg = { 0 };

	struct k3_ringacc *ringacc = ring->parent;

	int ret;



	ret = ringacc->tisci_ring_ops->config(

			ringacc->tisci,

			TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID,

			ringacc->tisci_dev_id,

			ring->ring_id,

			0,

			0,

			ring->size,

			0,

			0,

			0);

	ring_cfg.nav_id = ringacc->tisci_dev_id;

	ring_cfg.index = ring->ring_id;

	ring_cfg.valid_params = TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID;

	ring_cfg.count = ring->size;



	ret = ringacc->tisci_ring_ops->set_cfg(ringacc->tisci, &ring_cfg);

	if (ret)

		dev_err(ringacc->dev, "TISCI reset ring fail (%d) ring_idx %d\n",

			ret, ring->ring_id);
@@ -398,20 +397,16 @@ EXPORT_SYMBOL_GPL(k3_ringacc_ring_reset); 
static void k3_ringacc_ring_reconfig_qmode_sci(struct k3_ring *ring,

					       enum k3_ring_mode mode)

{

	struct ti_sci_msg_rm_ring_cfg ring_cfg = { 0 };

	struct k3_ringacc *ringacc = ring->parent;

	int ret;



	ret = ringacc->tisci_ring_ops->config(

			ringacc->tisci,

			TI_SCI_MSG_VALUE_RM_RING_MODE_VALID,

			ringacc->tisci_dev_id,

			ring->ring_id,

			0,

			0,

			0,

			mode,

			0,

			0);

	ring_cfg.nav_id = ringacc->tisci_dev_id;

	ring_cfg.index = ring->ring_id;

	ring_cfg.valid_params = TI_SCI_MSG_VALUE_RM_RING_MODE_VALID;

	ring_cfg.mode = mode;



	ret = ringacc->tisci_ring_ops->set_cfg(ringacc->tisci, &ring_cfg);

	if (ret)

		dev_err(ringacc->dev, "TISCI reconf qmode fail (%d) ring_idx %d\n",

			ret, ring->ring_id);
@@ -478,20 +473,15 @@ EXPORT_SYMBOL_GPL(k3_ringacc_ring_reset_dma); 


static void k3_ringacc_ring_free_sci(struct k3_ring *ring)

{

	struct ti_sci_msg_rm_ring_cfg ring_cfg = { 0 };

	struct k3_ringacc *ringacc = ring->parent;

	int ret;



	ret = ringacc->tisci_ring_ops->config(

			ringacc->tisci,

			TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER,

			ringacc->tisci_dev_id,

			ring->ring_id,

			0,

			0,

			0,

			0,

			0,

			0);

	ring_cfg.nav_id = ringacc->tisci_dev_id;

	ring_cfg.index = ring->ring_id;

	ring_cfg.valid_params = TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER;



	ret = ringacc->tisci_ring_ops->set_cfg(ringacc->tisci, &ring_cfg);

	if (ret)

		dev_err(ringacc->dev, "TISCI ring free fail (%d) ring_idx %d\n",

			ret, ring->ring_id);
@@ -521,11 +511,12 @@ int k3_ringacc_ring_free(struct k3_ring *ring) 


	k3_ringacc_ring_free_sci(ring);



	dma_free_coherent(ringacc->dev,

	dma_free_coherent(ring->dma_dev,

			  ring->size * (4 << ring->elm_size),

			  ring->ring_mem_virt, ring->ring_mem_dma);

	ring->flags = 0;

	ring->ops = NULL;

	ring->dma_dev = NULL;

	if (ring->proxy_id != K3_RINGACC_PROXY_NOT_USED) {

		clear_bit(ring->proxy_id, ringacc->proxy_inuse);

		ring->proxy = NULL;
@@ -575,28 +566,26 @@ EXPORT_SYMBOL_GPL(k3_ringacc_get_ring_irq_num); 


static int k3_ringacc_ring_cfg_sci(struct k3_ring *ring)

{

	struct ti_sci_msg_rm_ring_cfg ring_cfg = { 0 };

	struct k3_ringacc *ringacc = ring->parent;

	u32 ring_idx;

	int ret;



	if (!ringacc->tisci)

		return -EINVAL;



	ring_idx = ring->ring_id;

	ret = ringacc->tisci_ring_ops->config(

			ringacc->tisci,

			TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER,

			ringacc->tisci_dev_id,

			ring_idx,

			lower_32_bits(ring->ring_mem_dma),

			upper_32_bits(ring->ring_mem_dma),

			ring->size,

			ring->mode,

			ring->elm_size,

			0);

	ring_cfg.nav_id = ringacc->tisci_dev_id;

	ring_cfg.index = ring->ring_id;

	ring_cfg.valid_params = TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER;

	ring_cfg.addr_lo = lower_32_bits(ring->ring_mem_dma);

	ring_cfg.addr_hi = upper_32_bits(ring->ring_mem_dma);

	ring_cfg.count = ring->size;

	ring_cfg.mode = ring->mode;

	ring_cfg.size = ring->elm_size;



	ret = ringacc->tisci_ring_ops->set_cfg(ringacc->tisci, &ring_cfg);

	if (ret)

		dev_err(ringacc->dev, "TISCI config ring fail (%d) ring_idx %d\n",

			ret, ring_idx);

			ret, ring->ring_id);



	return ret;

}
@@ -648,8 +637,12 @@ int k3_ringacc_ring_cfg(struct k3_ring *ring, struct k3_ring_cfg *cfg) 
	switch (ring->mode) {

	case K3_RINGACC_RING_MODE_RING:

		ring->ops = &k3_ring_mode_ring_ops;

		ring->dma_dev = cfg->dma_dev;

		if (!ring->dma_dev)

			ring->dma_dev = ringacc->dev;

		break;

	case K3_RINGACC_RING_MODE_MESSAGE:

		ring->dma_dev = ringacc->dev;

		if (ring->proxy)

			ring->ops = &k3_ring_mode_proxy_ops;

		else
@@ -661,7 +654,7 @@ int k3_ringacc_ring_cfg(struct k3_ring *ring, struct k3_ring_cfg *cfg) 
		goto err_free_proxy;

	}



	ring->ring_mem_virt = dma_alloc_coherent(ringacc->dev,

	ring->ring_mem_virt = dma_alloc_coherent(ring->dma_dev,

						 ring->size * (4 << ring->elm_size),

						 &ring->ring_mem_dma, GFP_KERNEL);

	if (!ring->ring_mem_virt) {
@@ -684,12 +677,13 @@ int k3_ringacc_ring_cfg(struct k3_ring *ring, struct k3_ring_cfg *cfg) 
	return 0;



err_free_mem:

	dma_free_coherent(ringacc->dev,

	dma_free_coherent(ring->dma_dev,

			  ring->size * (4 << ring->elm_size),

			  ring->ring_mem_virt,

			  ring->ring_mem_dma);

err_free_ops:

	ring->ops = NULL;

	ring->dma_dev = NULL;

err_free_proxy:

	ring->proxy = NULL;

	return ret;

drivers/soc/ti/k3-socinfo.c

+1 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ static const struct k3_soc_id { 
	{ 0xBB5A, "AM65X" },

	{ 0xBB64, "J721E" },

	{ 0xBB6D, "J7200" },

	{ 0xBB38, "AM64X" }

};



static int

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