Commit 8db63b7c authored by Prike Liang's avatar Prike Liang Committed by Alex Deucher
Browse files

drm/amdgpu: enable DF clock gating for rn 



Enable DF clock gating during DF IP early init.

Signed-off-by: default avatarPrike Liang <Prike.Liang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e2ef3b70

drivers/gpu/drm/amd/amdgpu/soc15.c

+2 −1
Original line number Diff line number Diff line
@@ -1172,7 +1172,8 @@ static int soc15_common_early_init(void *handle) 
				 AMD_CG_SUPPORT_VCN_MGCG |

				 AMD_CG_SUPPORT_IH_CG |

				 AMD_CG_SUPPORT_ATHUB_LS |

				 AMD_CG_SUPPORT_ATHUB_MGCG;

				 AMD_CG_SUPPORT_ATHUB_MGCG |

				 AMD_CG_SUPPORT_DF_MGCG;

		adev->pg_flags = 0;

		adev->external_rev_id = adev->rev_id + 0x91;

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