Commit 8d5c2f03 authored by Sonic Zhang's avatar Sonic Zhang Committed by Mike Frysinger
Browse files

Blackfin: Allow bf548 ATAPI to be routed to GPIO 



By default, it is routed to async memory address. In GPIO case,
GPIO peripheral PINs should be requested in advance.

Signed-off-by: default avatarSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
Signed-off-by: default avatarBryan Wu <cooloney@kernel.org>
parent ffdf3ec8

arch/blackfin/mach-bf548/Kconfig

+7 −0
Original line number Diff line number Diff line
@@ -11,6 +11,13 @@ config DEB_DMA_URGENT 
	help

	  Treat any DEB1, DEB2 and DEB3 request as Urgent



config BF548_ATAPI_ALTERNATIVE_PORT

	bool "BF548 ATAPI alternative port via GPIO"

	help

	  BF548 ATAPI data and address PINs can be routed through

	  async address or GPIO port F and G. Select y to route it

	  to GPIO.



comment "Interrupt Priority Assignment"

menu "Priority"

arch/blackfin/mach-bf548/include/mach/portmux.h

+45 −19
Original line number Diff line number Diff line
@@ -167,6 +167,8 @@ 
#define P_PPI0_D13	(P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(0))

#define P_PPI0_D14	(P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(0))

#define P_PPI0_D15	(P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(0))



#ifdef CONFIG_BF548_ATAPI_ALTERNATIVE_PORT

# define P_ATAPI_D0A	(P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(1))

# define P_ATAPI_D1A	(P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(1))

# define P_ATAPI_D2A	(P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(1))
@@ -183,6 +185,24 @@ 
# define P_ATAPI_D13A	(P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(1))

# define P_ATAPI_D14A	(P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1))

# define P_ATAPI_D15A	(P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1))

#else

# define P_ATAPI_D0A	(P_DONTCARE)

# define P_ATAPI_D1A	(P_DONTCARE)

# define P_ATAPI_D2A	(P_DONTCARE)

# define P_ATAPI_D3A	(P_DONTCARE)

# define P_ATAPI_D4A	(P_DONTCARE)

# define P_ATAPI_D5A	(P_DONTCARE)

# define P_ATAPI_D6A	(P_DONTCARE)

# define P_ATAPI_D7A	(P_DONTCARE)

# define P_ATAPI_D8A	(P_DONTCARE)

# define P_ATAPI_D9A	(P_DONTCARE)

# define P_ATAPI_D10A	(P_DONTCARE)

# define P_ATAPI_D11A	(P_DONTCARE)

# define P_ATAPI_D12A	(P_DONTCARE)

# define P_ATAPI_D13A	(P_DONTCARE)

# define P_ATAPI_D14A	(P_DONTCARE)

# define P_ATAPI_D15A	(P_DONTCARE)

#endif



#define P_PPI0_CLK	(P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0))

#define P_PPI0_FS1	(P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
@@ -200,9 +220,15 @@ 
#define P_CAN0_RX	(P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(0))

#define P_CAN1_TX	(P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(0))

#define P_CAN1_RX	(P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(0))

#ifdef CONFIG_BF548_ATAPI_ALTERNATIVE_PORT

# define P_ATAPI_A0A	(P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(1))

# define P_ATAPI_A1A	(P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(1))

# define P_ATAPI_A2A	(P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(1))

#else

# define P_ATAPI_A0A	(P_DONTCARE)

# define P_ATAPI_A1A	(P_DONTCARE)

# define P_ATAPI_A2A	(P_DONTCARE)

#endif

#define P_HOST_CE	(P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(1))

#define P_HOST_RD	(P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(1))

#define P_HOST_WR	(P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(1))

CRA Git | Maintained and supported by SUSTech CRA and CCSE