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DFL based FPGA devices could support interrupts for different purposes, but current DFL framework only supports feature device enumeration with given MMIO resources information via common DFL headers. This patch introduces one new API dfl_fpga_enum_info_add_irq for low level bus drivers (e.g. PCIe device driver) to pass its interrupt resources information to DFL framework for enumeration, and also adds interrupt enumeration code in framework to parse and assign interrupt resources for enumerated feature devices and their own sub features. With this patch, DFL framework enumerates interrupt resources for core features, including PORT Error Reporting, FME (FPGA Management Engine) Error Reporting and also AFU User Interrupts. Signed-off-by:Luwei Kang <luwei.kang@intel.com> Signed-off-by:
Wu Hao <hao.wu@intel.com> Signed-off-by:
Xu Yilun <yilun.xu@intel.com> Reviewed-by:
Marcelo Tosatti <mtosatti@redhat.com> Acked-by:
Wu Hao <hao.wu@intel.com> Signed-off-by:
Moritz Fischer <mdf@kernel.org>
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