Commit 8ca7c160 authored by Florian Fainelli's avatar Florian Fainelli Committed by David S. Miller
Browse files

net: dsa: b53: Add ability to enable/disable port interrupts 



Some switches expose individual interrupt line(s) for port specific
event(s), allow configuring these interrupts at an appropriate time
during port_enable/disable callbacks where all port specific resources
are known to be set-up and ready for use.

Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent a3f72307

drivers/net/dsa/b53/b53_common.c

+9 −0
Original line number Diff line number Diff line
@@ -502,8 +502,14 @@ int b53_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy) 
{

	struct b53_device *dev = ds->priv;

	unsigned int cpu_port = ds->ports[port].cpu_dp->index;

	int ret = 0;

	u16 pvlan;



	if (dev->ops->irq_enable)

		ret = dev->ops->irq_enable(dev, port);

	if (ret)

		return ret;



	/* Clear the Rx and Tx disable bits and set to no spanning tree */

	b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), 0);
@@ -536,6 +542,9 @@ void b53_disable_port(struct dsa_switch *ds, int port, struct phy_device *phy) 
	b53_read8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), &reg);

	reg |= PORT_CTRL_RX_DISABLE | PORT_CTRL_TX_DISABLE;

	b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), reg);



	if (dev->ops->irq_disable)

		dev->ops->irq_disable(dev, port);

}

EXPORT_SYMBOL(b53_disable_port);

drivers/net/dsa/b53/b53_priv.h

+2 −0
Original line number Diff line number Diff line
@@ -43,6 +43,8 @@ struct b53_io_ops { 
	int (*write64)(struct b53_device *dev, u8 page, u8 reg, u64 value);

	int (*phy_read16)(struct b53_device *dev, int addr, int reg, u16 *value);

	int (*phy_write16)(struct b53_device *dev, int addr, int reg, u16 value);

	int (*irq_enable)(struct b53_device *dev, int port);

	void (*irq_disable)(struct b53_device *dev, int port);

};



enum {

CRA Git | Maintained and supported by SUSTech CRA and CCSE