Commit 8ca4fd04 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-2019-01-10' of git://anongit.freedesktop.org/drm/drm-intel into drm-next 



- Unwind failure on pinning the gen7 PPGTT (Chris)
- Fastset updates to make sure DRRS and PSR are properly enabled (Hans)
- Header include clean-up (Brajeswar, Jani)
- Improvements and clean-up on debugfs (Chris, Jani)
- Avoid division by zero on CNL clocks setup (Xiao)
- Restrict PSMI context load w/a to Haswell GT1 (Chris)
- Remove HW semaphores for gen7 inter-engine sync (Chris)
- Pull the render flush into breadcrumb emission (Chris)
- i915_params copy and free helpers and other reorgs and docs (Jani)
- Remove has_pooled_eu static initializer (Tvrtko)
- Updates on kerneldoc (Chris)
- Remove redundant trailing request flush (Chris)
- ringbuffer irq seqno fixes and clean-up (Chris)
- splitting off runtime device info and other clean-up around (Jani)
- Selftests improvements (Chris, Daniele)
- Flush RING_IMR changes before changing the global GT IMR on gen6 and HSW (Chris)
- Some improvements and fixes around GPU reset and GPU hang report (Chris)
- Remove partial attempt to swizzle on pread/pwrite (Chris)
- Return immediately if trylock fails for direct-reclaim (Chris)
- Downgrade scare message for unknown HuC firmware (Jani)
- ACPI / PMIC for MIPI / DSI (Hans)
- Reduce i915_request_alloc retirement to local context (Chris)
- Init per-engine WAs for all engines (Daniele)
- drop DPF code for gen8+ (Daniele)
- Guard error capture against unpinned vma (Chris)
- Use mutex_lock_killable from inside the shrinker (Chris)
- Removing pooling from struct_mutex from vmap shrinker (Chris)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

# gpg: Signature made Fri 11 Jan 2019 09:58:18 AEST
# gpg:                using RSA key FA625F640EEB13CA
# gpg: Good signature from "Rodrigo Vivi <rodrigo.vivi@intel.com>"
# gpg:                 aka "Rodrigo Vivi <rodrigo.vivi@gmail.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6D20 7068 EEDD 6509 1C2C  E2A3 FA62 5F64 0EEB 13CA

# Conflicts:
#	drivers/gpu/drm/i915/intel_dp.c
#	drivers/gpu/drm/i915/intel_drv.h
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190114183820.GA2855@intel.com
parents f164a94c 74256b7e

drivers/acpi/pmic/intel_pmic.c

+61 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 


#include <linux/export.h>

#include <linux/acpi.h>

#include <linux/mfd/intel_soc_pmic.h>

#include <linux/regmap.h>

#include <acpi/acpi_lpat.h>

#include "intel_pmic.h"
@@ -36,6 +37,8 @@ struct intel_pmic_opregion { 
	struct intel_pmic_regs_handler_ctx ctx;

};



static struct intel_pmic_opregion *intel_pmic_opregion;



static int pmic_get_reg_bit(int address, struct pmic_table *table,

			    int count, int *reg, int *bit)

{
@@ -304,6 +307,7 @@ int intel_pmic_install_opregion_handler(struct device *dev, acpi_handle handle, 
	}



	opregion->data = d;

	intel_pmic_opregion = opregion;

	return 0;



out_remove_thermal_handler:
@@ -319,3 +323,60 @@ out_error: 
	return ret;

}

EXPORT_SYMBOL_GPL(intel_pmic_install_opregion_handler);



/**

 * intel_soc_pmic_exec_mipi_pmic_seq_element - Execute PMIC MIPI sequence

 * @i2c_address:  I2C client address for the PMIC

 * @reg_address:  PMIC register address

 * @value:        New value for the register bits to change

 * @mask:         Mask indicating which register bits to change

 *

 * DSI LCD panels describe an initialization sequence in the i915 VBT (Video

 * BIOS Tables) using so called MIPI sequences. One possible element in these

 * sequences is a PMIC specific element of 15 bytes.

 *

 * This function executes these PMIC specific elements sending the embedded

 * commands to the PMIC.

 *

 * Return 0 on success, < 0 on failure.

 */

int intel_soc_pmic_exec_mipi_pmic_seq_element(u16 i2c_address, u32 reg_address,

					      u32 value, u32 mask)

{

	struct intel_pmic_opregion_data *d;

	int ret;



	if (!intel_pmic_opregion) {

		pr_warn("%s: No PMIC registered\n", __func__);

		return -ENXIO;

	}



	d = intel_pmic_opregion->data;



	mutex_lock(&intel_pmic_opregion->lock);



	if (d->exec_mipi_pmic_seq_element) {

		ret = d->exec_mipi_pmic_seq_element(intel_pmic_opregion->regmap,

						    i2c_address, reg_address,

						    value, mask);

	} else if (d->pmic_i2c_address) {

		if (i2c_address == d->pmic_i2c_address) {

			ret = regmap_update_bits(intel_pmic_opregion->regmap,

						 reg_address, mask, value);

		} else {

			pr_err("%s: Unexpected i2c-addr: 0x%02x (reg-addr 0x%x value 0x%x mask 0x%x)\n",

			       __func__, i2c_address, reg_address, value, mask);

			ret = -ENXIO;

		}

	} else {

		pr_warn("%s: Not implemented\n", __func__);

		pr_warn("%s: i2c-addr: 0x%x reg-addr 0x%x value 0x%x mask 0x%x\n",

			__func__, i2c_address, reg_address, value, mask);

		ret = -EOPNOTSUPP;

	}



	mutex_unlock(&intel_pmic_opregion->lock);



	return ret;

}

EXPORT_SYMBOL_GPL(intel_soc_pmic_exec_mipi_pmic_seq_element);

drivers/acpi/pmic/intel_pmic.h

+4 −0
Original line number Diff line number Diff line
@@ -15,10 +15,14 @@ struct intel_pmic_opregion_data { 
	int (*update_aux)(struct regmap *r, int reg, int raw_temp);

	int (*get_policy)(struct regmap *r, int reg, int bit, u64 *value);

	int (*update_policy)(struct regmap *r, int reg, int bit, int enable);

	int (*exec_mipi_pmic_seq_element)(struct regmap *r, u16 i2c_address,

					  u32 reg_address, u32 value, u32 mask);

	struct pmic_table *power_table;

	int power_table_count;

	struct pmic_table *thermal_table;

	int thermal_table_count;

	/* For generic exec_mipi_pmic_seq_element handling */

	int pmic_i2c_address;

};



int intel_pmic_install_opregion_handler(struct device *dev, acpi_handle handle, struct regmap *regmap, struct intel_pmic_opregion_data *d);

drivers/acpi/pmic/intel_pmic_chtwc.c

+19 −0
Original line number Diff line number Diff line
@@ -231,6 +231,24 @@ static int intel_cht_wc_pmic_update_power(struct regmap *regmap, int reg, 
	return regmap_update_bits(regmap, reg, bitmask, on ? 1 : 0);

}



static int intel_cht_wc_exec_mipi_pmic_seq_element(struct regmap *regmap,

						   u16 i2c_client_address,

						   u32 reg_address,

						   u32 value, u32 mask)

{

	u32 address;



	if (i2c_client_address > 0xff || reg_address > 0xff) {

		pr_warn("%s warning addresses too big client 0x%x reg 0x%x\n",

			__func__, i2c_client_address, reg_address);

		return -ERANGE;

	}



	address = (i2c_client_address << 8) | reg_address;



	return regmap_update_bits(regmap, address, mask, value);

}



/*

 * The thermal table and ops are empty, we do not support the Thermal opregion

 * (DPTF) due to lacking documentation.
@@ -238,6 +256,7 @@ static int intel_cht_wc_pmic_update_power(struct regmap *regmap, int reg, 
static struct intel_pmic_opregion_data intel_cht_wc_pmic_opregion_data = {

	.get_power		= intel_cht_wc_pmic_get_power,

	.update_power		= intel_cht_wc_pmic_update_power,

	.exec_mipi_pmic_seq_element = intel_cht_wc_exec_mipi_pmic_seq_element,

	.power_table		= power_table,

	.power_table_count	= ARRAY_SIZE(power_table),

};

drivers/acpi/pmic/intel_pmic_xpower.c

+1 −0
Original line number Diff line number Diff line
@@ -240,6 +240,7 @@ static struct intel_pmic_opregion_data intel_xpower_pmic_opregion_data = { 
	.power_table_count = ARRAY_SIZE(power_table),

	.thermal_table = thermal_table,

	.thermal_table_count = ARRAY_SIZE(thermal_table),

	.pmic_i2c_address = 0x34,

};



static acpi_status intel_xpower_pmic_gpio_handler(u32 function,

drivers/gpu/drm/drm_dp_helper.c

+2 −0
Original line number Diff line number Diff line
@@ -1276,6 +1276,8 @@ static const struct dpcd_quirk dpcd_quirk_list[] = { 
	{ OUI(0x00, 0x22, 0xb9), DEVICE_ID_ANY, true, BIT(DP_DPCD_QUIRK_CONSTANT_N) },

	/* LG LP140WF6-SPM1 eDP panel */

	{ OUI(0x00, 0x22, 0xb9), DEVICE_ID('s', 'i', 'v', 'a', 'r', 'T'), false, BIT(DP_DPCD_QUIRK_CONSTANT_N) },

	/* Apple panels need some additional handling to support PSR */

	{ OUI(0x00, 0x10, 0xfa), DEVICE_ID_ANY, false, BIT(DP_DPCD_QUIRK_NO_PSR) }

};



#undef OUI

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