Commit 8c945b7e authored by Alexandre Belloni's avatar Alexandre Belloni
Browse files

ARM: at91/dt: at91sam9rl: use slow clock where necessary



The watchdog, the reset controller, the RTC, the real-time timer, the
shutdown controller and the timer counter need the slow clock, add it where
necessary.

Acked-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
parent 67451069
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+6 −2
Original line number Diff line number Diff line
@@ -121,8 +121,8 @@
				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
					     <17 IRQ_TYPE_LEVEL_HIGH 0>,
					     <18 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
				clock-names = "t0_clk", "t1_clk", "t2_clk";
				clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
				clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
			};

			mmc0: mmc@fffa4000 {
@@ -1018,11 +1018,13 @@
			rstc@fffffd00 {
				compatible = "atmel,at91sam9260-rstc";
				reg = <0xfffffd00 0x10>;
				clocks = <&clk32k>;
			};

			shdwc@fffffd10 {
				compatible = "atmel,at91sam9260-shdwc";
				reg = <0xfffffd10 0x10>;
				clocks = <&clk32k>;
			};

			pit: timer@fffffd30 {
@@ -1036,6 +1038,7 @@
				compatible = "atmel,at91sam9260-wdt";
				reg = <0xfffffd40 0x10>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&clk32k>;
				status = "disabled";
			};

@@ -1083,6 +1086,7 @@
				compatible = "atmel,at91rm9200-rtc";
				reg = <0xfffffe00 0x40>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&clk32k>;
				status = "disabled";
			};