sfc: Extend self-tests (8c8661e4) · Commits · 戴 / test

drivers/net/sfc/bitfield.h

+18 −1

Original line number	Diff line number	Diff line
		@@ -416,12 +416,23 @@ typedef union efx_oword {
		* for read-modify-write operations.
		*
		*/

		#define EFX_INVERT_OWORD(oword) do { \
		(oword).u64[0] = ~((oword).u64[0]); \
		(oword).u64[1] = ~((oword).u64[1]); \
		} while (0)

		#define EFX_AND_OWORD(oword, from, mask) \
		do { \
		(oword).u64[0] = (from).u64[0] & (mask).u64[0]; \
		(oword).u64[1] = (from).u64[1] & (mask).u64[1]; \
		} while (0)

		#define EFX_OR_OWORD(oword, from, mask) \
		do { \
		(oword).u64[0] = (from).u64[0] \| (mask).u64[0]; \
		(oword).u64[1] = (from).u64[1] \| (mask).u64[1]; \
		} while (0)

		#define EFX_INSERT64(min, max, low, high, value) \
		cpu_to_le64(EFX_INSERT_NATIVE(min, max, low, high, value))

		@@ -529,4 +540,10 @@ typedef union efx_oword {
		#define EFX_DMA_TYPE_WIDTH(width) \
		(((width) < DMA_ADDR_T_WIDTH) ? (width) : DMA_ADDR_T_WIDTH)


		/* Static initialiser */
		#define EFX_OWORD32(a, b, c, d) \
		{ .u32 = { __constant_cpu_to_le32(a), __constant_cpu_to_le32(b), \
		__constant_cpu_to_le32(c), __constant_cpu_to_le32(d) } }

		#endif /* EFX_BITFIELD_H */

drivers/net/sfc/efx.c

+14 −6

Original line number	Diff line number	Diff line
		@@ -508,6 +508,11 @@ static void efx_link_status_changed(struct efx_nic *efx)
		if (!netif_running(efx->net_dev))
		return;

		if (efx->port_inhibited) {
		netif_carrier_off(efx->net_dev);
		return;
		}

		if (efx->link_up != netif_carrier_ok(efx->net_dev)) {
		efx->n_link_state_changes++;

		@@ -549,7 +554,7 @@ static void efx_link_status_changed(struct efx_nic *efx)

		/* This call reinitialises the MAC to pick up new PHY settings. The
		* caller must hold the mac_lock */
		static void __efx_reconfigure_port(struct efx_nic *efx)
		void __efx_reconfigure_port(struct efx_nic *efx)
		{
		WARN_ON(!mutex_is_locked(&efx->mac_lock));

		@@ -634,6 +639,7 @@ static int efx_init_port(struct efx_nic *efx)
		return rc;

		efx->port_initialized = true;
		efx->stats_enabled = true;

		/* Reconfigure port to program MAC registers */
		falcon_reconfigure_xmac(efx);
		@@ -1311,7 +1317,7 @@ static struct net_device_stats efx_net_stats(struct net_device net_dev)
		*/
		if (!spin_trylock(&efx->stats_lock))
		return stats;
		if (efx->state == STATE_RUNNING) {
		if (efx->stats_enabled) {
		falcon_update_stats_xmac(efx);
		falcon_update_nic_stats(efx);
		}
		@@ -1529,7 +1535,7 @@ static void efx_unregister_netdev(struct efx_nic *efx)

		/* Tears down the entire software state and most of the hardware state
		* before reset. */
		static void efx_reset_down(struct efx_nic efx, struct ethtool_cmd ecmd)
		void efx_reset_down(struct efx_nic efx, struct ethtool_cmd ecmd)
		{
		int rc;

		@@ -1538,6 +1544,7 @@ static void efx_reset_down(struct efx_nic efx, struct ethtool_cmd ecmd)
		/* The net_dev->get_stats handler is quite slow, and will fail
		* if a fetch is pending over reset. Serialise against it. */
		spin_lock(&efx->stats_lock);
		efx->stats_enabled = false;
		spin_unlock(&efx->stats_lock);

		efx_stop_all(efx);
		@@ -1555,8 +1562,7 @@ static void efx_reset_down(struct efx_nic efx, struct ethtool_cmd ecmd)
		* that we were unable to reinitialise the hardware, and the
		* driver should be disabled. If ok is false, then the rx and tx
		* engines are not restarted, pending a RESET_DISABLE. */
		static int efx_reset_up(struct efx_nic efx, struct ethtool_cmd ecmd,
		bool ok)
		int efx_reset_up(struct efx_nic efx, struct ethtool_cmd ecmd, bool ok)
		{
		int rc;

		@@ -1577,8 +1583,10 @@ static int efx_reset_up(struct efx_nic efx, struct ethtool_cmd ecmd,

		mutex_unlock(&efx->mac_lock);

		if (ok)
		if (ok) {
		efx_start_all(efx);
		efx->stats_enabled = true;
		}
		return rc;
		}

drivers/net/sfc/efx.h

+6 −0

Original line number	Diff line number	Diff line
		@@ -37,6 +37,12 @@ extern void efx_flush_queues(struct efx_nic *efx);

		/* Ports */
		extern void efx_reconfigure_port(struct efx_nic *efx);
		extern void __efx_reconfigure_port(struct efx_nic *efx);

		/* Reset handling */
		extern void efx_reset_down(struct efx_nic efx, struct ethtool_cmd ecmd);
		extern int efx_reset_up(struct efx_nic efx, struct ethtool_cmd ecmd,
		bool ok);

		/* Global */
		extern void efx_schedule_reset(struct efx_nic *efx, enum reset_type type);

drivers/net/sfc/ethtool.c

+10 −12

Original line number	Diff line number	Diff line
		@@ -333,7 +333,10 @@ static int efx_ethtool_fill_self_tests(struct efx_nic *efx,
		unsigned int n = 0;
		enum efx_loopback_mode mode;

		/* Interrupt */
		efx_fill_test(n++, strings, data, &tests->mii,
		"core", 0, "mii", NULL);
		efx_fill_test(n++, strings, data, &tests->nvram,
		"core", 0, "nvram", NULL);
		efx_fill_test(n++, strings, data, &tests->interrupt,
		"core", 0, "interrupt", NULL);

		@@ -353,16 +356,17 @@ static int efx_ethtool_fill_self_tests(struct efx_nic *efx,
		"eventq.poll", NULL);
		}

		/* PHY presence */
		efx_fill_test(n++, strings, data, &tests->phy_ok,
		EFX_PORT_NAME, "phy_ok", NULL);
		efx_fill_test(n++, strings, data, &tests->registers,
		"core", 0, "registers", NULL);
		efx_fill_test(n++, strings, data, &tests->phy,
		EFX_PORT_NAME, "phy", NULL);

		/* Loopback tests */
		efx_fill_test(n++, strings, data, &tests->loopback_speed,
		EFX_PORT_NAME, "loopback.speed", NULL);
		efx_fill_test(n++, strings, data, &tests->loopback_full_duplex,
		EFX_PORT_NAME, "loopback.full_duplex", NULL);
		for (mode = LOOPBACK_NONE; mode < LOOPBACK_TEST_MAX; mode++) {
		for (mode = LOOPBACK_NONE; mode <= LOOPBACK_TEST_MAX; mode++) {
		if (!(efx->loopback_modes & (1 << mode)))
		continue;
		n = efx_fill_loopback_test(efx,
		@@ -500,15 +504,9 @@ static void efx_ethtool_self_test(struct net_device *net_dev,
		goto out;

		/* Perform offline tests only if online tests passed */
		if (offline) {
		/* Stop the kernel from sending packets during the test. */
		efx_stop_queue(efx);
		efx_flush_queues(efx);

		if (offline)
		rc = efx_offline_test(efx, &efx_tests,
		efx->loopback_modes);
		efx_wake_queue(efx);
		}

		out:
		if (!already_up)

drivers/net/sfc/falcon.c

+175 −23

Original line number	Diff line number	Diff line
		@@ -2223,6 +2223,170 @@ void falcon_set_multicast_hash(struct efx_nic *efx)
		falcon_write(efx, &mc_hash->oword[1], MAC_MCAST_HASH_REG1_KER);
		}


		/**************************************************************************
		*
		* Falcon test code
		*
		**************************************************************************/

		int falcon_read_nvram(struct efx_nic efx, struct falcon_nvconfig nvconfig_out)
		{
		struct falcon_nvconfig *nvconfig;
		struct efx_spi_device *spi;
		void *region;
		int rc, magic_num, struct_ver;
		__le16 word, limit;
		u32 csum;

		region = kmalloc(NVCONFIG_END, GFP_KERNEL);
		if (!region)
		return -ENOMEM;
		nvconfig = region + NVCONFIG_OFFSET;

		spi = efx->spi_flash ? efx->spi_flash : efx->spi_eeprom;
		rc = falcon_spi_read(spi, 0, NVCONFIG_END, NULL, region);
		if (rc) {
		EFX_ERR(efx, "Failed to read %s\n",
		efx->spi_flash ? "flash" : "EEPROM");
		rc = -EIO;
		goto out;
		}

		magic_num = le16_to_cpu(nvconfig->board_magic_num);
		struct_ver = le16_to_cpu(nvconfig->board_struct_ver);

		rc = -EINVAL;
		if (magic_num != NVCONFIG_BOARD_MAGIC_NUM) {
		EFX_ERR(efx, "NVRAM bad magic 0x%x\n", magic_num);
		goto out;
		}
		if (struct_ver < 2) {
		EFX_ERR(efx, "NVRAM has ancient version 0x%x\n", struct_ver);
		goto out;
		} else if (struct_ver < 4) {
		word = &nvconfig->board_magic_num;
		limit = (__le16 *) (nvconfig + 1);
		} else {
		word = region;
		limit = region + NVCONFIG_END;
		}
		for (csum = 0; word < limit; ++word)
		csum += le16_to_cpu(*word);

		if (~csum & 0xffff) {
		EFX_ERR(efx, "NVRAM has incorrect checksum\n");
		goto out;
		}

		rc = 0;
		if (nvconfig_out)
		memcpy(nvconfig_out, nvconfig, sizeof(*nvconfig));

		out:
		kfree(region);
		return rc;
		}

		/* Registers tested in the falcon register test */
		static struct {
		unsigned address;
		efx_oword_t mask;
		} efx_test_registers[] = {
		{ ADR_REGION_REG_KER,
		EFX_OWORD32(0x0001FFFF, 0x0001FFFF, 0x0001FFFF, 0x0001FFFF) },
		{ RX_CFG_REG_KER,
		EFX_OWORD32(0xFFFFFFFE, 0x00017FFF, 0x00000000, 0x00000000) },
		{ TX_CFG_REG_KER,
		EFX_OWORD32(0x7FFF0037, 0x00000000, 0x00000000, 0x00000000) },
		{ TX_CFG2_REG_KER,
		EFX_OWORD32(0xFFFEFE80, 0x1FFFFFFF, 0x020000FE, 0x007FFFFF) },
		{ MAC0_CTRL_REG_KER,
		EFX_OWORD32(0xFFFF0000, 0x00000000, 0x00000000, 0x00000000) },
		{ SRM_TX_DC_CFG_REG_KER,
		EFX_OWORD32(0x001FFFFF, 0x00000000, 0x00000000, 0x00000000) },
		{ RX_DC_CFG_REG_KER,
		EFX_OWORD32(0x0000000F, 0x00000000, 0x00000000, 0x00000000) },
		{ RX_DC_PF_WM_REG_KER,
		EFX_OWORD32(0x000003FF, 0x00000000, 0x00000000, 0x00000000) },
		{ DP_CTRL_REG,
		EFX_OWORD32(0x00000FFF, 0x00000000, 0x00000000, 0x00000000) },
		{ XM_GLB_CFG_REG,
		EFX_OWORD32(0x00000C68, 0x00000000, 0x00000000, 0x00000000) },
		{ XM_TX_CFG_REG,
		EFX_OWORD32(0x00080164, 0x00000000, 0x00000000, 0x00000000) },
		{ XM_RX_CFG_REG,
		EFX_OWORD32(0x07100A0C, 0x00000000, 0x00000000, 0x00000000) },
		{ XM_RX_PARAM_REG,
		EFX_OWORD32(0x00001FF8, 0x00000000, 0x00000000, 0x00000000) },
		{ XM_FC_REG,
		EFX_OWORD32(0xFFFF0001, 0x00000000, 0x00000000, 0x00000000) },
		{ XM_ADR_LO_REG,
		EFX_OWORD32(0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000) },
		{ XX_SD_CTL_REG,
		EFX_OWORD32(0x0003FF0F, 0x00000000, 0x00000000, 0x00000000) },
		};

		static bool efx_masked_compare_oword(const efx_oword_t a, const efx_oword_t b,
		const efx_oword_t *mask)
		{
		return ((a->u64[0] ^ b->u64[0]) & mask->u64[0]) \|\|
		((a->u64[1] ^ b->u64[1]) & mask->u64[1]);
		}

		int falcon_test_registers(struct efx_nic *efx)
		{
		unsigned address = 0, i, j;
		efx_oword_t mask, imask, original, reg, buf;

		/* Falcon should be in loopback to isolate the XMAC from the PHY */
		WARN_ON(!LOOPBACK_INTERNAL(efx));

		for (i = 0; i < ARRAY_SIZE(efx_test_registers); ++i) {
		address = efx_test_registers[i].address;
		mask = imask = efx_test_registers[i].mask;
		EFX_INVERT_OWORD(imask);

		falcon_read(efx, &original, address);

		/* bit sweep on and off */
		for (j = 0; j < 128; j++) {
		if (!EFX_EXTRACT_OWORD32(mask, j, j))
		continue;

		/* Test this testable bit can be set in isolation */
		EFX_AND_OWORD(reg, original, mask);
		EFX_SET_OWORD32(reg, j, j, 1);

		falcon_write(efx, &reg, address);
		falcon_read(efx, &buf, address);

		if (efx_masked_compare_oword(&reg, &buf, &mask))
		goto fail;

		/* Test this testable bit can be cleared in isolation */
		EFX_OR_OWORD(reg, original, mask);
		EFX_SET_OWORD32(reg, j, j, 0);

		falcon_write(efx, &reg, address);
		falcon_read(efx, &buf, address);

		if (efx_masked_compare_oword(&reg, &buf, &mask))
		goto fail;
		}

		falcon_write(efx, &original, address);
		}

		return 0;

		fail:
		EFX_ERR(efx, "wrote "EFX_OWORD_FMT" read "EFX_OWORD_FMT
		" at address 0x%x mask "EFX_OWORD_FMT"\n", EFX_OWORD_VAL(reg),
		EFX_OWORD_VAL(buf), address, EFX_OWORD_VAL(mask));
		return -EIO;
		}

		/**************************************************************************
		*
		* Device reset
		@@ -2404,37 +2568,22 @@ static void falcon_remove_spi_devices(struct efx_nic *efx)
		static int falcon_probe_nvconfig(struct efx_nic *efx)
		{
		struct falcon_nvconfig *nvconfig;
		struct efx_spi_device *spi;
		int magic_num, struct_ver, board_rev;
		int board_rev;
		int rc;

		nvconfig = kmalloc(sizeof(*nvconfig), GFP_KERNEL);
		if (!nvconfig)
		return -ENOMEM;

		/* Read the whole configuration structure into memory. */
		spi = efx->spi_flash ? efx->spi_flash : efx->spi_eeprom;
		rc = falcon_spi_read(spi, NVCONFIG_BASE, sizeof(*nvconfig),
		NULL, (char *)nvconfig);
		if (rc) {
		EFX_ERR(efx, "Failed to read %s\n", efx->spi_flash ? "flash" :
		"EEPROM");
		goto fail1;
		}

		/* Read the MAC addresses */
		memcpy(efx->mac_address, nvconfig->mac_address[0], ETH_ALEN);

		/* Read the board configuration. */
		magic_num = le16_to_cpu(nvconfig->board_magic_num);
		struct_ver = le16_to_cpu(nvconfig->board_struct_ver);

		if (magic_num != NVCONFIG_BOARD_MAGIC_NUM \|\| struct_ver < 2) {
		EFX_ERR(efx, "Non volatile memory bad magic=%x ver=%x "
		"therefore using defaults\n", magic_num, struct_ver);
		rc = falcon_read_nvram(efx, nvconfig);
		if (rc == -EINVAL) {
		EFX_ERR(efx, "NVRAM is invalid therefore using defaults\n");
		efx->phy_type = PHY_TYPE_NONE;
		efx->mii.phy_id = PHY_ADDR_INVALID;
		board_rev = 0;
		rc = 0;
		} else if (rc) {
		goto fail1;
		} else {
		struct falcon_nvconfig_board_v2 *v2 = &nvconfig->board_v2;
		struct falcon_nvconfig_board_v3 *v3 = &nvconfig->board_v3;
		@@ -2443,7 +2592,7 @@ static int falcon_probe_nvconfig(struct efx_nic *efx)
		efx->mii.phy_id = v2->port0_phy_addr;
		board_rev = le16_to_cpu(v2->board_revision);

		if (struct_ver >= 3) {
		if (le16_to_cpu(nvconfig->board_struct_ver) >= 3) {
		__le32 fl = v3->spi_device_type[EE_SPI_FLASH];
		__le32 ee = v3->spi_device_type[EE_SPI_EEPROM];
		rc = falcon_spi_device_init(efx, &efx->spi_flash,
		@@ -2459,6 +2608,9 @@ static int falcon_probe_nvconfig(struct efx_nic *efx)
		}
		}

		/* Read the MAC addresses */
		memcpy(efx->mac_address, nvconfig->mac_address[0], ETH_ALEN);

		EFX_LOG(efx, "PHY is %d phy_id %d\n", efx->phy_type, efx->mii.phy_id);

		efx_set_board_info(efx, board_rev);

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