Unverified Commit 8c79fa6c authored by Jungseung Lee's avatar Jungseung Lee Committed by Tudor Ambarus
Browse files

mtd: spi-nor: introduce SR_BP_SHIFT define 



The shift variable of SR_BP is conclusive because the first bit of SR_BP
is fixed on all known flashes. Replace ffs operation with SR_BP_SHIFT.

Signed-off-by: default avatarJungseung Lee <js07.lee@samsung.com>
Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
parent 5b24efe7

drivers/mtd/spi-nor/spi-nor.c

+5 −6
Original line number Diff line number Diff line
@@ -1767,7 +1767,6 @@ static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs, 
	struct mtd_info *mtd = &nor->mtd;

	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;

	u8 tb_mask = SR_TB_BIT5;

	int shift = ffs(mask) - 1;

	int pow;



	if (nor->flags & SNOR_F_HAS_SR_TB_BIT6)
@@ -1778,7 +1777,7 @@ static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs, 
		*ofs = 0;

		*len = 0;

	} else {

		pow = ((sr & mask) ^ mask) >> shift;

		pow = ((sr & mask) ^ mask) >> SR_BP_SHIFT;

		*len = mtd->size >> pow;

		if (nor->flags & SNOR_F_HAS_SR_TB && sr & tb_mask)

			*ofs = 0;
@@ -1860,7 +1859,7 @@ static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) 
	int ret, status_old, status_new;

	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;

	u8 tb_mask = SR_TB_BIT5;

	u8 shift = ffs(mask) - 1, pow, val;

	u8 pow, val;

	loff_t lock_len;

	bool can_be_top = true, can_be_bottom = nor->flags & SNOR_F_HAS_SR_TB;

	bool use_top;
@@ -1909,7 +1908,7 @@ static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) 
	 *   pow = ceil(log2(size / len)) = log2(size) - floor(log2(len))

	 */

	pow = ilog2(mtd->size) - ilog2(lock_len);

	val = mask - (pow << shift);

	val = mask - (pow << SR_BP_SHIFT);

	if (val & ~mask)

		return -EINVAL;

	/* Don't "lock" with no region! */
@@ -1946,7 +1945,7 @@ static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) 
	int ret, status_old, status_new;

	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;

	u8 tb_mask = SR_TB_BIT5;

	u8 shift = ffs(mask) - 1, pow, val;

	u8 pow, val;

	loff_t lock_len;

	bool can_be_top = true, can_be_bottom = nor->flags & SNOR_F_HAS_SR_TB;

	bool use_top;
@@ -1997,7 +1996,7 @@ static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) 
	if (lock_len == 0) {

		val = 0; /* fully unlocked */

	} else {

		val = mask - (pow << shift);

		val = mask - (pow << SR_BP_SHIFT);

		/* Some power-of-two sizes are not supported */

		if (val & ~mask)

			return -EINVAL;

include/linux/mtd/spi-nor.h

+2 −0
Original line number Diff line number Diff line
@@ -137,6 +137,8 @@ 


#define SR1_QUAD_EN_BIT6	BIT(6)



#define SR_BP_SHIFT		2



/* Enhanced Volatile Configuration Register bits */

#define EVCR_QUAD_EN_MICRON	BIT(7)	/* Micron Quad I/O */

CRA Git | Maintained and supported by SUSTech CRA and CCSE