Commit 8c65fe5f authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: limit the number of IVs processed at once 



Only process a maximum of 32 IVs before writing back the RPTR. This improves
hw handling when we get close to an overflow in the ring buffer.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b51cd19e

drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c

+2 −1
Original line number Diff line number Diff line
@@ -142,6 +142,7 @@ void amdgpu_ih_ring_fini(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) 
 */

int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih)

{

	unsigned int count = AMDGPU_IH_MAX_NUM_IVS;

	u32 wptr;



	if (!ih->enabled || adev->shutdown)
@@ -159,7 +160,7 @@ restart_ih: 
	/* Order reading of wptr vs. reading of IH ring data */

	rmb();



	while (ih->rptr != wptr) {

	while (ih->rptr != wptr && --count) {

		amdgpu_irq_dispatch(adev, ih);

		ih->rptr &= ih->ptr_mask;

	}

drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h

+3 −0
Original line number Diff line number Diff line
@@ -24,6 +24,9 @@ 
#ifndef __AMDGPU_IH_H__

#define __AMDGPU_IH_H__



/* Maximum number of IVs processed at once */

#define AMDGPU_IH_MAX_NUM_IVS	32



struct amdgpu_device;

struct amdgpu_iv_entry;

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