Commit 8c5a916f authored by Keerthy's avatar Keerthy Committed by Tony Lindgren
Browse files

ARM: OMAP2+: sleep33/43xx: Add RTC-Mode support 



Add support for RTC mode to low level suspend code. This includes
providing the rtc base address for the assembly code to configuring the
PMIC_PWR_EN line late in suspend to enter RTC+DDR mode.

Note: This patch also fold in left out space parameter for
am33xx_emif_sram_table and am43xx_emif_sram_table

Signed-off-by: default avatarDave Gerlach <d-gerlach@ti.com>
Signed-off-by: default avatarKeerthy <j-keerthy@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 74655749

arch/arm/mach-omap2/pm-asm-offsets.c

+2 −0
Original line number Diff line number Diff line
@@ -27,6 +27,8 @@ int main(void) 
	       offsetof(struct am33xx_pm_ro_sram_data, amx3_pm_sram_data_virt));

	DEFINE(AMX3_PM_RO_SRAM_DATA_PHYS_OFFSET,

	       offsetof(struct am33xx_pm_ro_sram_data, amx3_pm_sram_data_phys));

	DEFINE(AMX3_PM_RTC_BASE_VIRT_OFFSET,

	       offsetof(struct am33xx_pm_ro_sram_data, rtc_base_virt));

	DEFINE(AMX3_PM_RO_SRAM_DATA_SIZE,

	       sizeof(struct am33xx_pm_ro_sram_data));

arch/arm/mach-omap2/pm33xx-core.c

+10 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ 
static struct powerdomain *cefuse_pwrdm, *gfx_pwrdm, *per_pwrdm, *mpu_pwrdm;

static struct clockdomain *gfx_l4ls_clkdm;

static void __iomem *scu_base;

static struct omap_hwmod *rtc_oh;



static int __init am43xx_map_scu(void)

{
@@ -153,16 +154,25 @@ static struct am33xx_pm_sram_addr *amx3_get_sram_addrs(void) 
		return NULL;

}



void __iomem *am43xx_get_rtc_base_addr(void)

{

	rtc_oh = omap_hwmod_lookup("rtc");



	return omap_hwmod_get_mpu_rt_va(rtc_oh);

}



static struct am33xx_pm_platform_data am33xx_ops = {

	.init = am33xx_suspend_init,

	.soc_suspend = am33xx_suspend,

	.get_sram_addrs = amx3_get_sram_addrs,

	.get_rtc_base_addr = am43xx_get_rtc_base_addr,

};



static struct am33xx_pm_platform_data am43xx_ops = {

	.init = am43xx_suspend_init,

	.soc_suspend = am43xx_suspend,

	.get_sram_addrs = amx3_get_sram_addrs,

	.get_rtc_base_addr = am43xx_get_rtc_base_addr,

};



static struct am33xx_pm_platform_data *am33xx_pm_get_pdata(void)

arch/arm/mach-omap2/sleep33xx.S

+3 −2
Original line number Diff line number Diff line
@@ -228,8 +228,6 @@ ENDPROC(am33xx_resume_from_deep_sleep) 
 * Local variables

 */

	.align

resume_addr:

	.word	cpu_resume - PAGE_OFFSET + 0x80000000

kernel_flush:

	.word   v7_flush_dcache_all

virt_mpu_clkctrl:
@@ -252,6 +250,9 @@ ENTRY(am33xx_pm_sram) 
	.word am33xx_emif_sram_table

	.word am33xx_pm_ro_sram_data



resume_addr:

.word  cpu_resume - PAGE_OFFSET + 0x80000000



.align 3

ENTRY(am33xx_pm_ro_sram_data)

	.space AMX3_PM_RO_SRAM_DATA_SIZE

arch/arm/mach-omap2/sleep43xx.S

+52 −2
Original line number Diff line number Diff line
@@ -48,6 +48,13 @@ 
					AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET)

#define AM43XX_PRM_EMIF_CTRL_OFFSET			0x0030



#define RTC_SECONDS_REG					0x0

#define RTC_PMIC_REG					0x98

#define RTC_PMIC_POWER_EN				BIT(16)

#define RTC_PMIC_EXT_WAKEUP_STS				BIT(12)

#define RTC_PMIC_EXT_WAKEUP_POL				BIT(4)

#define RTC_PMIC_EXT_WAKEUP_EN				BIT(0)



	.arm

	.align 3
@@ -147,6 +154,20 @@ sync: 
	ldr	r4, [r2, #AMX3_PM_WFI_FLAGS_OFFSET]



cache_skip_flush:

	/*

	 * If we are trying to enter RTC+DDR mode we must perform

	 * a read from the rtc address space to ensure translation

	 * presence in the TLB to avoid page table walk after DDR

	 * is unavailable.

	 */

	tst	r4, #WFI_FLAG_RTC_ONLY

	beq	skip_rtc_va_refresh



	adr	r3, am43xx_pm_ro_sram_data

	ldr	r1, [r3, #AMX3_PM_RTC_BASE_VIRT_OFFSET]

	ldr	r0, [r1]



skip_rtc_va_refresh:

	/* Check if we want self refresh */

	tst	r4, #WFI_FLAG_SELF_REFRESH

	beq	emif_skip_enter_sr
@@ -182,6 +203,34 @@ wait_emif_disable: 
	bne	wait_emif_disable



emif_skip_disable:

	tst	r4, #WFI_FLAG_RTC_ONLY

	beq	skip_rtc_only



	adr	r3, am43xx_pm_ro_sram_data

	ldr	r1, [r3, #AMX3_PM_RTC_BASE_VIRT_OFFSET]



	ldr	r0, [r1, #RTC_PMIC_REG]

	orr	r0, r0, #RTC_PMIC_POWER_EN

	orr	r0, r0, #RTC_PMIC_EXT_WAKEUP_STS

	orr	r0, r0, #RTC_PMIC_EXT_WAKEUP_EN

	orr	r0, r0, #RTC_PMIC_EXT_WAKEUP_POL

	str	r0, [r1, #RTC_PMIC_REG]

	ldr	r0, [r1, #RTC_PMIC_REG]

	/* Wait for 2 seconds to lose power */

	mov	r3, #2

	ldr	r2, [r1, #RTC_SECONDS_REG]

rtc_loop:

	ldr	r0, [r1, #RTC_SECONDS_REG]

	cmp	r0, r2

	beq	rtc_loop

	mov	r2, r0

	subs	r3, r3, #1

	bne	rtc_loop



	b	re_enable_emif



skip_rtc_only:



	tst	r4, #WFI_FLAG_WAKE_M3

	beq	wkup_m3_skip
@@ -247,6 +296,7 @@ wkup_m3_skip: 
	mov	r2, #AM33XX_CM_CLKCTRL_MODULEMODE_ENABLE

	str	r2, [r1]



re_enable_emif:

	/* Re-enable EMIF */

	ldr	r1, am43xx_virt_emif_clkctrl

	mov	r2, #AM33XX_CM_CLKCTRL_MODULEMODE_ENABLE
@@ -381,8 +431,6 @@ ENDPROC(am43xx_resume_from_deep_sleep) 
 * Local variables

 */

	.align

resume_addr:

	.word	cpu_resume - PAGE_OFFSET + 0x80000000

kernel_flush:

	.word   v7_flush_dcache_all

ddr_start:
@@ -429,6 +477,8 @@ ENTRY(am43xx_pm_sram) 
	.word am43xx_emif_sram_table

	.word am43xx_pm_ro_sram_data



resume_addr:

	.word   cpu_resume - PAGE_OFFSET + 0x80000000

.align 3



ENTRY(am43xx_pm_ro_sram_data)

drivers/soc/ti/pm33xx.c

+1 −0
Original line number Diff line number Diff line
@@ -229,6 +229,7 @@ static int am33xx_push_sram_idle(void) 
	ro_sram_data.amx3_pm_sram_data_virt = ocmcram_location_data;

	ro_sram_data.amx3_pm_sram_data_phys =

		gen_pool_virt_to_phys(sram_pool_data, ocmcram_location_data);

	ro_sram_data.rtc_base_virt = pm_ops->get_rtc_base_addr();



	/* Save physical address to calculate resume offset during pm init */

	am33xx_do_wfi_sram_phys = gen_pool_virt_to_phys(sram_pool,

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