drm/amdgpu: move vcn ring test to amdgpu_vcn.c (8c303c01) · Commits · 戴 / test

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

+36 −0

Original line number	Diff line number	Diff line
		@@ -232,6 +232,42 @@ void amdgpu_vcn_ring_end_use(struct amdgpu_ring *ring)
		schedule_delayed_work(&ring->adev->vcn.idle_work, VCN_IDLE_TIMEOUT);
		}

		int amdgpu_vcn_dec_ring_test_ring(struct amdgpu_ring *ring)
		{
		struct amdgpu_device *adev = ring->adev;
		uint32_t tmp = 0;
		unsigned i;
		int r;

		WREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0xCAFEDEAD);
		r = amdgpu_ring_alloc(ring, 3);
		if (r) {
		DRM_ERROR("amdgpu: cp failed to lock ring %d (%d).\n",
		ring->idx, r);
		return r;
		}
		amdgpu_ring_write(ring,
		PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0));
		amdgpu_ring_write(ring, 0xDEADBEEF);
		amdgpu_ring_commit(ring);
		for (i = 0; i < adev->usec_timeout; i++) {
		tmp = RREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID));
		if (tmp == 0xDEADBEEF)
		break;
		DRM_UDELAY(1);
		}

		if (i < adev->usec_timeout) {
		DRM_INFO("ring test on %d succeeded in %d usecs\n",
		ring->idx, i);
		} else {
		DRM_ERROR("amdgpu: ring %d test failed (0x%08X)\n",
		ring->idx, tmp);
		r = -EINVAL;
		}
		return r;
		}

		static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring ring, struct amdgpu_bo bo,
		bool direct, struct dma_fence **fence)
		{

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -52,6 +52,8 @@ int amdgpu_vcn_suspend(struct amdgpu_device *adev);
		int amdgpu_vcn_resume(struct amdgpu_device *adev);
		void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring);
		void amdgpu_vcn_ring_end_use(struct amdgpu_ring *ring);

		int amdgpu_vcn_dec_ring_test_ring(struct amdgpu_ring *ring);
		int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout);

		int amdgpu_vcn_enc_ring_test_ring(struct amdgpu_ring *ring);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

+1 −44

Original line number	Diff line number	Diff line
		@@ -538,49 +538,6 @@ static void vcn_v1_0_dec_ring_emit_hdp_invalidate(struct amdgpu_ring *ring)
		amdgpu_ring_write(ring, 1);
		}

		/**
		* vcn_v1_0_dec_ring_test_ring - register write test
		*
		* @ring: amdgpu_ring pointer
		*
		* Test if we can successfully write to the context register
		*/
		static int vcn_v1_0_dec_ring_test_ring(struct amdgpu_ring *ring)
		{
		struct amdgpu_device *adev = ring->adev;
		uint32_t tmp = 0;
		unsigned i;
		int r;

		WREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0xCAFEDEAD);
		r = amdgpu_ring_alloc(ring, 3);
		if (r) {
		DRM_ERROR("amdgpu: cp failed to lock ring %d (%d).\n",
		ring->idx, r);
		return r;
		}
		amdgpu_ring_write(ring,
		PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0));
		amdgpu_ring_write(ring, 0xDEADBEEF);
		amdgpu_ring_commit(ring);
		for (i = 0; i < adev->usec_timeout; i++) {
		tmp = RREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID));
		if (tmp == 0xDEADBEEF)
		break;
		DRM_UDELAY(1);
		}

		if (i < adev->usec_timeout) {
		DRM_INFO("ring test on %d succeeded in %d usecs\n",
		ring->idx, i);
		} else {
		DRM_ERROR("amdgpu: ring %d test failed (0x%08X)\n",
		ring->idx, tmp);
		r = -EINVAL;
		}
		return r;
		}

		/**
		* vcn_v1_0_dec_ring_emit_ib - execute indirect buffer
		*
		@@ -732,7 +689,7 @@ static const struct amdgpu_ring_funcs vcn_v1_0_dec_ring_vm_funcs = {
		.emit_fence = vcn_v1_0_dec_ring_emit_fence,
		.emit_vm_flush = vcn_v1_0_dec_ring_emit_vm_flush,
		.emit_hdp_invalidate = vcn_v1_0_dec_ring_emit_hdp_invalidate,
		.test_ring = vcn_v1_0_dec_ring_test_ring,
		.test_ring = amdgpu_vcn_dec_ring_test_ring,
		.test_ib = amdgpu_vcn_dec_ring_test_ib,
		.insert_nop = amdgpu_ring_insert_nop,
		.pad_ib = amdgpu_ring_generic_pad_ib,

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