Commit 8c0b742c authored May 15, 2010 by Kirill A. Shutemov Committed by Russell King May 15, 2010

ARM: 6134/1: Handle instruction cache maintenance fault properly



Between "clean D line..." and "invalidate I line" operations in
v7_coherent_user_range(), the memory page may get swapped out.
And the fault on "invalidate I line" could not be properly handled
causing the oops.

In ARMv6 "external abort on linefetch" replaced by "instruction cache
maintenance fault". Let's handle it as translation fault. It fixes the
issue.

I'm not sure if it's reasonable to check arch version in run-time.
Let's do it in compile time for now.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@nokia.com>
Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

parent 49aea0fd

arch/arm/mm/fault.c

+5 −0

Original line number	Diff line number	Diff line
		@@ -463,7 +463,12 @@ static struct fsr_info {
		{ do_bad, SIGILL, BUS_ADRALN, "alignment exception" },
		{ do_bad, SIGKILL, 0, "terminal exception" },
		{ do_bad, SIGILL, BUS_ADRALN, "alignment exception" },
		/* Do we need runtime check ? */
		#if __LINUX_ARM_ARCH__ < 6
		{ do_bad, SIGBUS, 0, "external abort on linefetch" },
		#else
		{ do_translation_fault, SIGSEGV, SEGV_MAPERR, "I-cache maintenance fault" },
		#endif
		{ do_translation_fault, SIGSEGV, SEGV_MAPERR, "section translation fault" },
		{ do_bad, SIGBUS, 0, "external abort on linefetch" },
		{ do_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" },

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