Commit 8bf5973a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux 

Pull clk fixes from Stephen Boyd:
 "A collection of fixes:

   - Make of_clk.h self contained

   - Fix new qcom DT bindings that just merged to match the DTS files

   - Fix qcom clk driver to properly detect DFS clk frequencies

   - Fix the ls1028a driver to not deref a pointer before assigning it"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  of: clk: Make <linux/of_clk.h> self-contained
  clk: qcom: Use ARRAY_SIZE in videocc-sc7180 for parent clocks
  clk: qcom: Get rid of the test clock for videocc-sc7180
  dt-bindings: clock: Cleanup qcom,videocc bindings for sdm845/sc7180
  clk: qcom: Use ARRAY_SIZE in gpucc-sc7180 for parent clocks
  clk: qcom: Get rid of the test clock for gpucc-sc7180
  dt-bindings: clock: Fix qcom,gpucc bindings for sdm845/sc7180/msm8998
  clk: qcom: Use ARRAY_SIZE in dispcc-sc7180 for parent clocks
  clk: qcom: Get rid of the test clock for dispcc-sc7180
  clk: qcom: Get rid of fallback global names for dispcc-sc7180
  dt-bindings: clock: Fix qcom,dispcc bindings for sdm845/sc7180
  clk: qcom: rcg2: Don't crash if our parent can't be found; return an error
  clk: ls1028a: fix a dereference of pointer 'parent' before a null check
  dt-bindings: clk: qcom: Fix self-validation, split, and clean cruft
  clk: qcom: Don't overwrite 'cfg' in clk_rcg2_dfs_populate_freq()
parents b34f01f7 5df86714

Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml

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# SPDX-License-Identifier: GPL-2.0-only

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,gcc-apq8064.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Global Clock & Reset Controller Binding for APQ8064



maintainers:

  - Stephen Boyd <sboyd@kernel.org>

  - Taniya Das <tdas@codeaurora.org>



description: |

  Qualcomm global clock control module which supports the clocks, resets and

  power domains on APQ8064.



  See also:

  - dt-bindings/clock/qcom,gcc-msm8960.h

  - dt-bindings/reset/qcom,gcc-msm8960.h



properties:

  compatible:

    const: qcom,gcc-apq8064



  '#clock-cells':

    const: 1



  '#reset-cells':

    const: 1



  '#power-domain-cells':

    const: 1



  reg:

    maxItems: 1



  nvmem-cells:

    minItems: 1

    maxItems: 2

    description:

      Qualcomm TSENS (thermal sensor device) on some devices can

      be part of GCC and hence the TSENS properties can also be part

      of the GCC/clock-controller node.

      For more details on the TSENS properties please refer

      Documentation/devicetree/bindings/thermal/qcom-tsens.txt



  nvmem-cell-names:

    minItems: 1

    maxItems: 2

    items:

      - const: calib

      - const: calib_backup



  '#thermal-sensor-cells':

    const: 1



  protected-clocks:

    description:

      Protected clock specifier list as per common clock binding.



required:

  - compatible

  - reg

  - '#clock-cells'

  - '#reset-cells'

  - '#power-domain-cells'

  - nvmem-cells

  - nvmem-cell-names

  - '#thermal-sensor-cells'



examples:

  - |

    clock-controller@900000 {

      compatible = "qcom,gcc-apq8064";

      reg = <0x00900000 0x4000>;

      nvmem-cells = <&tsens_calib>, <&tsens_backup>;

      nvmem-cell-names = "calib", "calib_backup";

      #clock-cells = <1>;

      #reset-cells = <1>;

      #power-domain-cells = <1>;

      #thermal-sensor-cells = <1>;

    };

...

Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml

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# SPDX-License-Identifier: GPL-2.0-only

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8074.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Global Clock & Reset Controller Bindingfor IPQ8074



maintainers:

  - Stephen Boyd <sboyd@kernel.org>

  - Taniya Das <tdas@codeaurora.org>



description: |

  Qualcomm global clock control module which supports the clocks, resets and

  power domains on IPQ8074.



  See also:

  - dt-bindings/clock/qcom,gcc-ipq8074.h



properties:

  compatible:

    const: qcom,gcc-ipq8074



  '#clock-cells':

    const: 1



  '#reset-cells':

    const: 1



  reg:

    maxItems: 1



  protected-clocks:

    description:

      Protected clock specifier list as per common clock binding.



required:

  - compatible

  - reg

  - '#clock-cells'

  - '#reset-cells'



examples:

  - |

    clock-controller@1800000 {

      compatible = "qcom,gcc-ipq8074";

      reg = <0x01800000 0x80000>;

      #clock-cells = <1>;

      #reset-cells = <1>;

    };

...

Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml

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# SPDX-License-Identifier: GPL-2.0-only

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8996.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Global Clock & Reset Controller Binding for MSM8996



maintainers:

  - Stephen Boyd <sboyd@kernel.org>

  - Taniya Das <tdas@codeaurora.org>



description: |

  Qualcomm global clock control module which supports the clocks, resets and

  power domains on MSM8996.



  See also:

  - dt-bindings/clock/qcom,gcc-msm8996.h



properties:

  compatible:

    const: qcom,gcc-msm8996



  clocks:

    items:

      - description: XO source

      - description: Second XO source

      - description: Sleep clock source



  clock-names:

    items:

      - const: cxo

      - const: cxo2

      - const: sleep_clk



  '#clock-cells':

    const: 1



  '#reset-cells':

    const: 1



  '#power-domain-cells':

    const: 1



  reg:

    maxItems: 1



  protected-clocks:

    description:

      Protected clock specifier list as per common clock binding.



required:

  - compatible

  - reg

  - '#clock-cells'

  - '#reset-cells'

  - '#power-domain-cells'



examples:

  - |

    clock-controller@300000 {

      compatible = "qcom,gcc-msm8996";

      #clock-cells = <1>;

      #reset-cells = <1>;

      #power-domain-cells = <1>;

      reg = <0x300000 0x90000>;

    };

...

Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml

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# SPDX-License-Identifier: GPL-2.0-only

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8998.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Global Clock & Reset Controller Binding for MSM8998



maintainers:

  - Stephen Boyd <sboyd@kernel.org>

  - Taniya Das <tdas@codeaurora.org>



description: |

  Qualcomm global clock control module which supports the clocks, resets and

  power domains on MSM8998.



  See also:

  - dt-bindings/clock/qcom,gcc-msm8998.h



properties:

  compatible:

    const: qcom,gcc-msm8998



  clocks:

    items:

      - description: Board XO source

      - description: Sleep clock source

      - description: USB 3.0 phy pipe clock

      - description: UFS phy rx symbol clock for pipe 0

      - description: UFS phy rx symbol clock for pipe 1

      - description: UFS phy tx symbol clock

      - description: PCIE phy pipe clock



  clock-names:

    items:

      - const: xo

      - const: sleep_clk

      - const: usb3_pipe

      - const: ufs_rx_symbol0

      - const: ufs_rx_symbol1

      - const: ufs_tx_symbol0

      - const: pcie0_pipe



  '#clock-cells':

    const: 1



  '#reset-cells':

    const: 1



  '#power-domain-cells':

    const: 1



  reg:

    maxItems: 1



  protected-clocks:

    description:

      Protected clock specifier list as per common clock binding.



required:

  - compatible

  - clocks

  - clock-names

  - reg

  - '#clock-cells'

  - '#reset-cells'

  - '#power-domain-cells'



examples:

  - |

    #include <dt-bindings/clock/qcom,rpmcc.h>

    clock-controller@100000 {

      compatible = "qcom,gcc-msm8998";

      #clock-cells = <1>;

      #reset-cells = <1>;

      #power-domain-cells = <1>;

      reg = <0x00100000 0xb0000>;

      clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,

               <&sleep>,

               <0>,

               <0>,

               <0>,

               <0>,

               <0>;

      clock-names = "xo",

                    "sleep_clk",

                    "usb3_pipe",

                    "ufs_rx_symbol0",

                    "ufs_rx_symbol1",

                    "ufs_tx_symbol0",

                    "pcie0_pipe";

    };

...

Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml

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# SPDX-License-Identifier: GPL-2.0-only

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,gcc-qcs404.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Global Clock & Reset Controller Bindingfor QCS404



maintainers:

  - Stephen Boyd <sboyd@kernel.org>

  - Taniya Das <tdas@codeaurora.org>



description: |

  Qualcomm global clock control module which supports the clocks, resets and

  power domains on QCS404.



  See also:

  - dt-bindings/clock/qcom,gcc-qcs404.h



properties:

  compatible:

    const: qcom,gcc-qcs404



  '#clock-cells':

    const: 1



  '#reset-cells':

    const: 1



  reg:

    maxItems: 1



  protected-clocks:

    description:

      Protected clock specifier list as per common clock binding.



required:

  - compatible

  - reg

  - '#clock-cells'

  - '#reset-cells'



examples:

  - |

    clock-controller@1800000 {

      compatible = "qcom,gcc-qcs404";

      reg = <0x01800000 0x80000>;

      #clock-cells = <1>;

      #reset-cells = <1>;

    };

...

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