irqchip: ingenic: Alloc generic chips from IRQ domain (8bc7464b) · Commits · 戴 / test

drivers/irqchip/irq-ingenic.c

+17 −13

Original line number	Diff line number	Diff line
		@@ -36,12 +36,14 @@ static irqreturn_t intc_cascade(int irq, void *data)
		{
		struct ingenic_intc_data *intc = irq_get_handler_data(irq);
		struct irq_domain *domain = intc->domain;
		struct irq_chip_generic *gc;
		uint32_t irq_reg;
		unsigned i;

		for (i = 0; i < intc->num_chips; i++) {
		irq_reg = readl(intc->base + (i * CHIP_SIZE) +
		JZ_REG_INTC_PENDING);
		gc = irq_get_domain_generic_chip(domain, i * 32);

		irq_reg = irq_reg_readl(gc, JZ_REG_INTC_PENDING);
		if (!irq_reg)
		continue;

		@@ -92,7 +94,7 @@ static int __init ingenic_intc_of_init(struct device_node *node,

		domain = irq_domain_add_legacy(node, num_chips * 32,
		JZ4740_IRQ_BASE, 0,
		&irq_domain_simple_ops, NULL);
		&irq_generic_chip_ops, NULL);
		if (!domain) {
		err = -ENOMEM;
		goto out_unmap_base;
		@@ -100,17 +102,17 @@ static int __init ingenic_intc_of_init(struct device_node *node,

		intc->domain = domain;

		for (i = 0; i < num_chips; i++) {
		/* Mask all irqs */
		writel(0xffffffff, intc->base + (i * CHIP_SIZE) +
		JZ_REG_INTC_SET_MASK);
		err = irq_alloc_domain_generic_chips(domain, 32, 1, "INTC",
		handle_level_irq, 0,
		IRQ_NOPROBE \| IRQ_LEVEL, 0);
		if (err)
		goto out_domain_remove;

		gc = irq_alloc_generic_chip("INTC", 1,
		JZ4740_IRQ_BASE + (i * 32),
		intc->base + (i * CHIP_SIZE),
		handle_level_irq);
		for (i = 0; i < num_chips; i++) {
		gc = irq_get_domain_generic_chip(domain, i * 32);

		gc->wake_enabled = IRQ_MSK(32);
		gc->reg_base = intc->base + (i * CHIP_SIZE);

		ct = gc->chip_types;
		ct->regs.enable = JZ_REG_INTC_CLEAR_MASK;
		@@ -121,13 +123,15 @@ static int __init ingenic_intc_of_init(struct device_node *node,
		ct->chip.irq_set_wake = irq_gc_set_wake;
		ct->chip.flags = IRQCHIP_MASK_ON_SUSPEND;

		irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0,
		IRQ_NOPROBE \| IRQ_LEVEL);
		/* Mask all irqs */
		irq_reg_writel(gc, IRQ_MSK(32), JZ_REG_INTC_SET_MASK);
		}

		setup_irq(parent_irq, &intc_cascade_action);
		return 0;

		out_domain_remove:
		irq_domain_remove(domain);
		out_unmap_base:
		iounmap(intc->base);
		out_unmap_irq:

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