Commit 8bb5021c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'powerpc-5.9-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux 

Pull powerpc fixes from Michael Ellerman:

 - Revert our removal of PROT_SAO, at least one user expressed an
   interest in using it on Power9. Instead don't allow it to be used in
   guests unless enabled explicitly at compile time.

 - A fix for a crash introduced by a recent change to FP handling.

 - Revert a change to our idle code that left Power10 with no idle
   support.

 - One minor fix for the new scv system call path to set PPR.

 - Fix a crash in our "generic" PMU if branch stack events were enabled.

 - A fix for the IMC PMU, to correctly identify host kernel samples.

 - The ADB_PMU powermac code was found to be incompatible with
   VMAP_STACK, so make them incompatible in Kconfig until the code can
   be fixed.

 - A build fix in drivers/video/fbdev/controlfb.c, and a documentation
   fix.

Thanks to Alexey Kardashevskiy, Athira Rajeev, Christophe Leroy,
Giuseppe Sacco, Madhavan Srinivasan, Milton Miller, Nicholas Piggin,
Pratik Rajesh Sampat, Randy Dunlap, Shawn Anastasio, Vaidyanathan
Srinivasan.

* tag 'powerpc-5.9-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/32s: Disable VMAP stack which CONFIG_ADB_PMU
  Revert "powerpc/powernv/idle: Replace CPU feature check with PVR check"
  powerpc/perf: Fix reading of MSR[HV/PR] bits in trace-imc
  powerpc/perf: Fix crashes with generic_compat_pmu & BHRB
  powerpc/64s: Fix crash in load_fp_state() due to fpexc_mode
  powerpc/64s: scv entry should set PPR
  Documentation/powerpc: fix malformed table in syscall64-abi
  video: fbdev: controlfb: Fix build for COMPILE_TEST=y && PPC_PMAC=n
  selftests/powerpc: Update PROT_SAO test to skip ISA 3.1
  powerpc/64s: Disallow PROT_SAO in LPARs by default
  Revert "powerpc/64s: Remove PROT_SAO support"
parents 6f0306d1 4a133eb3

Documentation/powerpc/syscall64-abi.rst

+3 −1
Original line number Diff line number Diff line
@@ -49,16 +49,18 @@ Register preservation rules 
Register preservation rules match the ELF ABI calling sequence with the

following differences:



=========== ============= ========================================

--- For the sc instruction, differences with the ELF ABI ---

=========== ============= ========================================

r0          Volatile      (System call number.)

r3          Volatile      (Parameter 1, and return value.)

r4-r8       Volatile      (Parameters 2-6.)

cr0         Volatile      (cr0.SO is the return error condition.)

cr1, cr5-7  Nonvolatile

lr          Nonvolatile

=========== ============= ========================================



--- For the scv 0 instruction, differences with the ELF ABI ---

=========== ============= ========================================

r0          Volatile      (System call number.)

r3          Volatile      (Parameter 1, and return value.)

r4-r8       Volatile      (Parameters 2-6.)

arch/powerpc/Kconfig

+12 −0
Original line number Diff line number Diff line
@@ -860,6 +860,18 @@ config PPC_SUBPAGE_PROT 


	  If unsure, say N here.



config PPC_PROT_SAO_LPAR

	bool "Support PROT_SAO mappings in LPARs"

	depends on PPC_BOOK3S_64

	help

	  This option adds support for PROT_SAO mappings from userspace

	  inside LPARs on supported CPUs.



	  This may cause issues when performing guest migration from

	  a CPU that supports SAO to one that does not.



	  If unsure, say N here.



config PPC_COPRO_BASE

	bool

arch/powerpc/include/asm/book3s/64/pgtable.h

+3 −5
Original line number Diff line number Diff line
@@ -20,13 +20,9 @@ 
#define _PAGE_RW		(_PAGE_READ | _PAGE_WRITE)

#define _PAGE_RWX		(_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)

#define _PAGE_PRIVILEGED	0x00008 /* kernel access only */



#define _PAGE_CACHE_CTL		0x00030 /* Bits for the folowing cache modes */

			/*	No bits set is normal cacheable memory */

			/*	0x00010 unused, is SAO bit on radix POWER9 */

#define _PAGE_SAO		0x00010 /* Strong access order */

#define _PAGE_NON_IDEMPOTENT	0x00020 /* non idempotent memory */

#define _PAGE_TOLERANT		0x00030 /* tolerant memory, cache inhibited */



#define _PAGE_DIRTY		0x00080 /* C: page changed */

#define _PAGE_ACCESSED		0x00100 /* R: page referenced */

/*
@@ -828,6 +824,8 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr, 
	return hash__set_pte_at(mm, addr, ptep, pte, percpu);

}



#define _PAGE_CACHE_CTL	(_PAGE_SAO | _PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT)



#define pgprot_noncached pgprot_noncached

static inline pgprot_t pgprot_noncached(pgprot_t prot)

{

arch/powerpc/include/asm/cputable.h

+5 −5
Original line number Diff line number Diff line
@@ -196,7 +196,7 @@ static inline void cpu_feature_keys_init(void) { } 
#define CPU_FTR_SPURR			LONG_ASM_CONST(0x0000000001000000)

#define CPU_FTR_DSCR			LONG_ASM_CONST(0x0000000002000000)

#define CPU_FTR_VSX			LONG_ASM_CONST(0x0000000004000000)

// Free					LONG_ASM_CONST(0x0000000008000000)

#define CPU_FTR_SAO			LONG_ASM_CONST(0x0000000008000000)

#define CPU_FTR_CP_USE_DCBTZ		LONG_ASM_CONST(0x0000000010000000)

#define CPU_FTR_UNALIGNED_LD_STD	LONG_ASM_CONST(0x0000000020000000)

#define CPU_FTR_ASYM_SMT		LONG_ASM_CONST(0x0000000040000000)
@@ -441,7 +441,7 @@ static inline void cpu_feature_keys_init(void) { } 
	    CPU_FTR_MMCRA | CPU_FTR_SMT | \

	    CPU_FTR_COHERENT_ICACHE | \

	    CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \

	    CPU_FTR_DSCR | CPU_FTR_ASYM_SMT | \

	    CPU_FTR_DSCR | CPU_FTR_SAO  | CPU_FTR_ASYM_SMT | \

	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \

	    CPU_FTR_CFAR | CPU_FTR_HVMODE | \

	    CPU_FTR_VMX_COPY | CPU_FTR_HAS_PPR | CPU_FTR_DABRX )
@@ -450,7 +450,7 @@ static inline void cpu_feature_keys_init(void) { } 
	    CPU_FTR_MMCRA | CPU_FTR_SMT | \

	    CPU_FTR_COHERENT_ICACHE | \

	    CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \

	    CPU_FTR_DSCR | \

	    CPU_FTR_DSCR | CPU_FTR_SAO  | \

	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \

	    CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \

	    CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_DAWR | \
@@ -461,7 +461,7 @@ static inline void cpu_feature_keys_init(void) { } 
	    CPU_FTR_MMCRA | CPU_FTR_SMT | \

	    CPU_FTR_COHERENT_ICACHE | \

	    CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \

	    CPU_FTR_DSCR | \

	    CPU_FTR_DSCR | CPU_FTR_SAO  | \

	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \

	    CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \

	    CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S | \
@@ -479,7 +479,7 @@ static inline void cpu_feature_keys_init(void) { } 
	    CPU_FTR_MMCRA | CPU_FTR_SMT | \

	    CPU_FTR_COHERENT_ICACHE | \

	    CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \

	    CPU_FTR_DSCR | \

	    CPU_FTR_DSCR | CPU_FTR_SAO  | \

	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \

	    CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \

	    CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S | \

arch/powerpc/include/asm/mman.h

+27 −4
Original line number Diff line number Diff line
@@ -13,20 +13,43 @@ 
#include <linux/pkeys.h>

#include <asm/cpu_has_feature.h>



#ifdef CONFIG_PPC_MEM_KEYS

static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot,

		unsigned long pkey)

{

	return pkey_to_vmflag_bits(pkey);

#ifdef CONFIG_PPC_MEM_KEYS

	return (((prot & PROT_SAO) ? VM_SAO : 0) | pkey_to_vmflag_bits(pkey));

#else

	return ((prot & PROT_SAO) ? VM_SAO : 0);

#endif

}

#define arch_calc_vm_prot_bits(prot, pkey) arch_calc_vm_prot_bits(prot, pkey)



static inline pgprot_t arch_vm_get_page_prot(unsigned long vm_flags)

{

	return __pgprot(vmflag_to_pte_pkey_bits(vm_flags));

#ifdef CONFIG_PPC_MEM_KEYS

	return (vm_flags & VM_SAO) ?

		__pgprot(_PAGE_SAO | vmflag_to_pte_pkey_bits(vm_flags)) :

		__pgprot(0 | vmflag_to_pte_pkey_bits(vm_flags));

#else

	return (vm_flags & VM_SAO) ? __pgprot(_PAGE_SAO) : __pgprot(0);

#endif

}

#define arch_vm_get_page_prot(vm_flags) arch_vm_get_page_prot(vm_flags)

#endif



static inline bool arch_validate_prot(unsigned long prot, unsigned long addr)

{

	if (prot & ~(PROT_READ | PROT_WRITE | PROT_EXEC | PROT_SEM | PROT_SAO))

		return false;

	if (prot & PROT_SAO) {

		if (!cpu_has_feature(CPU_FTR_SAO))

			return false;

		if (firmware_has_feature(FW_FEATURE_LPAR) &&

		    !IS_ENABLED(CONFIG_PPC_PROT_SAO_LPAR))

			return false;

	}

	return true;

}

#define arch_validate_prot arch_validate_prot



#endif /* CONFIG_PPC64 */

#endif	/* _ASM_POWERPC_MMAN_H */

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