Unverified Commit 8ba3c521 authored by Olivier Moysan's avatar Olivier Moysan Committed by Mark Brown
Browse files

ASoC: stm32: i2s: fix IRQ clearing



Because of regmap cache, interrupts may not be cleared
as expected.
Declare IFCR register as write only and make writings
to IFCR register unconditional.

Signed-off-by: default avatarOlivier Moysan <olivier.moysan@st.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent ae3f563a
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+6 −7
Original line number Diff line number Diff line
@@ -247,7 +247,7 @@ static irqreturn_t stm32_i2s_isr(int irq, void *devid)
		return IRQ_NONE;
	}

	regmap_update_bits(i2s->regmap, STM32_I2S_IFCR_REG,
	regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG,
			  I2S_IFCR_MASK, flags);

	if (flags & I2S_SR_OVR) {
@@ -277,7 +277,6 @@ static bool stm32_i2s_readable_reg(struct device *dev, unsigned int reg)
	case STM32_I2S_CFG2_REG:
	case STM32_I2S_IER_REG:
	case STM32_I2S_SR_REG:
	case STM32_I2S_IFCR_REG:
	case STM32_I2S_TXDR_REG:
	case STM32_I2S_RXDR_REG:
	case STM32_I2S_CGFR_REG:
@@ -559,7 +558,7 @@ static int stm32_i2s_startup(struct snd_pcm_substream *substream,
	i2s->refcount++;
	spin_unlock(&i2s->lock_fd);

	return regmap_update_bits(i2s->regmap, STM32_I2S_IFCR_REG,
	return regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG,
				 I2S_IFCR_MASK, I2S_IFCR_MASK);
}

@@ -611,7 +610,7 @@ static int stm32_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
			return ret;
		}

		regmap_update_bits(i2s->regmap, STM32_I2S_IFCR_REG,
		regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG,
				  I2S_IFCR_MASK, I2S_IFCR_MASK);

		if (playback_flg) {