Commit 8b9dbc16 authored by Russell King's avatar Russell King Committed by Russell King
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[ARM] omap: arrange for clock recalc methods to return the rate 



linux-omap source commit 33d000c99ee393fe2042f93e8422f94976d276ce
introduces a way to "dry run" clock changes before they're committed.
However, this involves putting logic to handle this into each and
every recalc function, and unfortunately due to the caching, led to
some bugs.

Solve both of issues by making the recalc methods always return the
clock rate for the clock, which the caller decides what to do with.

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 883992bd

arch/arm/mach-omap1/clock.c

+12 −20
Original line number Diff line number Diff line
@@ -156,27 +156,25 @@ __u32 arm_idlect1_mask; 
 * Omap1 specific clock functions

 *-------------------------------------------------------------------------*/



static void omap1_watchdog_recalc(struct clk * clk)

static unsigned long omap1_watchdog_recalc(struct clk *clk)

{

	clk->rate = clk->parent->rate / 14;

	return clk->parent->rate / 14;

}



static void omap1_uart_recalc(struct clk * clk)

static unsigned long omap1_uart_recalc(struct clk *clk)

{

	unsigned int val = __raw_readl(clk->enable_reg);

	if (val & clk->enable_bit)

		clk->rate = 48000000;

	else

		clk->rate = 12000000;

	return val & clk->enable_bit ? 48000000 : 12000000;

}



static void omap1_sossi_recalc(struct clk *clk)

static unsigned long omap1_sossi_recalc(struct clk *clk)

{

	u32 div = omap_readl(MOD_CONF_CTRL_1);



	div = (div >> 17) & 0x7;

	div++;

	clk->rate = clk->parent->rate / div;



	return clk->parent->rate / div;

}



static int omap1_clk_enable_dsp_domain(struct clk *clk)
@@ -344,19 +342,15 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) 
	return dsor_exp;

}



static void omap1_ckctl_recalc(struct clk * clk)

static unsigned long omap1_ckctl_recalc(struct clk *clk)

{

	int dsor;



	/* Calculate divisor encoded as 2-bit exponent */

	dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));

	int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));



	if (unlikely(clk->rate == clk->parent->rate / dsor))

		return; /* No change, quick exit */

	clk->rate = clk->parent->rate / dsor;

	return clk->parent->rate / dsor;

}



static void omap1_ckctl_recalc_dsp_domain(struct clk * clk)

static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk)

{

	int dsor;
@@ -371,9 +365,7 @@ static void omap1_ckctl_recalc_dsp_domain(struct clk * clk) 
	dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset));

	omap1_clk_disable(&api_ck.clk);



	if (unlikely(clk->rate == clk->parent->rate / dsor))

		return; /* No change, quick exit */

	clk->rate = clk->parent->rate / dsor;

	return clk->parent->rate / dsor;

}



/* MPU virtual clock functions */

arch/arm/mach-omap1/clock.h

+5 −5
Original line number Diff line number Diff line
@@ -13,14 +13,14 @@ 
#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H

#define __ARCH_ARM_MACH_OMAP1_CLOCK_H



static void omap1_ckctl_recalc(struct clk * clk);

static void omap1_watchdog_recalc(struct clk * clk);

static unsigned long omap1_ckctl_recalc(struct clk *clk);

static unsigned long omap1_watchdog_recalc(struct clk *clk);

static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate);

static void omap1_sossi_recalc(struct clk *clk);

static void omap1_ckctl_recalc_dsp_domain(struct clk * clk);

static unsigned long omap1_sossi_recalc(struct clk *clk);

static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk);

static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate);

static int omap1_set_uart_rate(struct clk * clk, unsigned long rate);

static void omap1_uart_recalc(struct clk * clk);

static unsigned long omap1_uart_recalc(struct clk *clk);

static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate);

static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate);

static void omap1_init_ext_clk(struct clk * clk);

arch/arm/mach-omap2/clock.c

+9 −8
Original line number Diff line number Diff line
@@ -239,11 +239,11 @@ u32 omap2_get_dpll_rate(struct clk *clk) 
 * Used for clocks that have the same value as the parent clock,

 * divided by some factor

 */

void omap2_fixed_divisor_recalc(struct clk *clk)

unsigned long omap2_fixed_divisor_recalc(struct clk *clk)

{

	WARN_ON(!clk->fixed_div);



	clk->rate = clk->parent->rate / clk->fixed_div;

	return clk->parent->rate / clk->fixed_div;

}



/**
@@ -449,21 +449,22 @@ err: 
 * Used for clocks that are part of CLKSEL_xyz governed clocks.

 * REVISIT: Maybe change to use clk->enable() functions like on omap1?

 */

void omap2_clksel_recalc(struct clk *clk)

unsigned long omap2_clksel_recalc(struct clk *clk)

{

	unsigned long rate;

	u32 div = 0;



	pr_debug("clock: recalc'ing clksel clk %s\n", clk->name);



	div = omap2_clksel_get_divisor(clk);

	if (div == 0)

		return;

		return clk->rate;



	if (clk->rate == (clk->parent->rate / div))

		return;

	clk->rate = clk->parent->rate / div;

	rate = clk->parent->rate / div;



	pr_debug("clock: new clock rate is %ld (div %d)\n", rate, div);



	pr_debug("clock: new clock rate is %ld (div %d)\n", clk->rate, div);

	return rate;

}



/**

arch/arm/mach-omap2/clock.h

+2 −2
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ void omap2_clk_disable_unused(struct clk *clk); 
#define omap2_clk_disable_unused	NULL

#endif



void omap2_clksel_recalc(struct clk *clk);

unsigned long omap2_clksel_recalc(struct clk *clk);

void omap2_init_clk_clkdm(struct clk *clk);

void omap2_init_clksel_parent(struct clk *clk);

u32 omap2_clksel_get_divisor(struct clk *clk);
@@ -44,7 +44,7 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate, 
				u32 *new_div);

u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val);

u32 omap2_divisor_to_clksel(struct clk *clk, u32 div);

void omap2_fixed_divisor_recalc(struct clk *clk);

unsigned long omap2_fixed_divisor_recalc(struct clk *clk);

long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate);

int omap2_clksel_set_rate(struct clk *clk, unsigned long rate);

u32 omap2_get_dpll_rate(struct clk *clk);

arch/arm/mach-omap2/clock24xx.c

+10 −10
Original line number Diff line number Diff line
@@ -369,9 +369,9 @@ static long omap2_dpllcore_round_rate(unsigned long target_rate) 


}



static void omap2_dpllcore_recalc(struct clk *clk)

static unsigned long omap2_dpllcore_recalc(struct clk *clk)

{

	clk->rate = omap2_get_dpll_rate_24xx(clk);

	return omap2_get_dpll_rate_24xx(clk);

}



static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
@@ -448,9 +448,9 @@ static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) 
 *

 * Set virt_prcm_set's rate to the mpu_speed field of the current PRCM set.

 */

static void omap2_table_mpu_recalc(struct clk *clk)

static unsigned long omap2_table_mpu_recalc(struct clk *clk)

{

	clk->rate = curr_prcm_set->mpu_speed;

	return curr_prcm_set->mpu_speed;

}



/*
@@ -647,14 +647,14 @@ static u32 omap2_get_sysclkdiv(void) 
	return div;

}



static void omap2_osc_clk_recalc(struct clk *clk)

static unsigned long omap2_osc_clk_recalc(struct clk *clk)

{

	clk->rate = omap2_get_apll_clkin() * omap2_get_sysclkdiv();

	return omap2_get_apll_clkin() * omap2_get_sysclkdiv();

}



static void omap2_sys_clk_recalc(struct clk *clk)

static unsigned long omap2_sys_clk_recalc(struct clk *clk)

{

	clk->rate = clk->parent->rate / omap2_get_sysclkdiv();

	return clk->parent->rate / omap2_get_sysclkdiv();

}



/*
@@ -707,9 +707,9 @@ int __init omap2_clk_init(void) 


	clk_init(&omap2_clk_functions);



	omap2_osc_clk_recalc(&osc_ck);

	osc_ck.rate = omap2_osc_clk_recalc(&osc_ck);

	propagate_rate(&osc_ck);

	omap2_sys_clk_recalc(&sys_ck);

	sys_ck.rate = omap2_sys_clk_recalc(&sys_ck);

	propagate_rate(&sys_ck);



	for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++)

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