Commit 8b14e1df authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc: Remove support for PowerPC 601 



PowerPC 601 has been retired.

Remove all associated specific code.

CPU_FTRS_PPC601 has CPU_FTR_COHERENT_ICACHE and CPU_FTR_COMMON.

CPU_FTR_COMMON is already present via other CPU_FTRS.
None of the remaining CPU selects CPU_FTR_COHERENT_ICACHE.

So CPU_FTRS_PPC601 can be removed from the possible features,
hence can be removed completely.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/60b725d55e21beec3335175c20b77903ff98284f.1601362098.git.christophe.leroy@csgroup.eu
parent f0ed73f3

arch/powerpc/boot/util.S

+1 −14
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ 


	.text



/* udelay (on non-601 processors) needs to know the period of the

/* udelay needs to know the period of the

 * timebase in nanoseconds.  This used to be hardcoded to be 60ns

 * (period of 66MHz/4).  Now a variable is used that is initialized to

 * 60 for backward compatibility, but it can be overridden as necessary
@@ -37,19 +37,6 @@ timebase_period_ns: 
 */

	.globl	udelay

udelay:

	mfspr	r4,SPRN_PVR

	srwi	r4,r4,16

	cmpwi	0,r4,1		/* 601 ? */

	bne	.Ludelay_not_601

00:	li	r0,86	/* Instructions / microsecond? */

	mtctr	r0

10:	addi	r0,r0,0 /* NOP */

	bdnz	10b

	subic.	r3,r3,1

	bne	00b

	blr



.Ludelay_not_601:

	mulli	r4,r3,1000	/* nanoseconds */

	/*  Change r4 to be the number of ticks using:

	 *	(nanoseconds + (timebase_period_ns - 1 )) / timebase_period_ns

arch/powerpc/include/asm/cputable.h

+3 −9
Original line number Diff line number Diff line
@@ -295,8 +295,6 @@ static inline void cpu_feature_keys_init(void) { } 
#define CPU_FTR_MAYBE_CAN_NAP	0

#endif



#define CPU_FTRS_PPC601	(CPU_FTR_COMMON | \

	CPU_FTR_COHERENT_ICACHE)

#define CPU_FTRS_603	(CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \

	    CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE | CPU_FTR_NOEXECUTE)

#define CPU_FTRS_604	(CPU_FTR_COMMON | CPU_FTR_PPC_LE)
@@ -512,10 +510,8 @@ static inline void cpu_feature_keys_init(void) { } 
#else

enum {

	CPU_FTRS_POSSIBLE =

#ifdef CONFIG_PPC_BOOK3S_601

	    CPU_FTRS_PPC601 |

#elif defined(CONFIG_PPC_BOOK3S_32)

	    CPU_FTRS_PPC601 | CPU_FTRS_603 | CPU_FTRS_604 | CPU_FTRS_740_NOTAU |

#ifdef CONFIG_PPC_BOOK3S_32

	    CPU_FTRS_603 | CPU_FTRS_604 | CPU_FTRS_740_NOTAU |

	    CPU_FTRS_740 | CPU_FTRS_750 | CPU_FTRS_750FX1 |

	    CPU_FTRS_750FX2 | CPU_FTRS_750FX | CPU_FTRS_750GX |

	    CPU_FTRS_7400_NOTAU | CPU_FTRS_7400 | CPU_FTRS_7450_20 |
@@ -590,9 +586,7 @@ enum { 
#else

enum {

	CPU_FTRS_ALWAYS =

#ifdef CONFIG_PPC_BOOK3S_601

	    CPU_FTRS_PPC601 &

#elif defined(CONFIG_PPC_BOOK3S_32)

#ifdef CONFIG_PPC_BOOK3S_32

	    CPU_FTRS_603 & CPU_FTRS_604 & CPU_FTRS_740_NOTAU &

	    CPU_FTRS_740 & CPU_FTRS_750 & CPU_FTRS_750FX1 &

	    CPU_FTRS_750FX2 & CPU_FTRS_750FX & CPU_FTRS_750GX &

arch/powerpc/include/asm/ppc_asm.h

+1 −2
Original line number Diff line number Diff line
@@ -401,8 +401,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96) 
#define MFTBU(dest)			mfspr dest, SPRN_TBRU

#endif



/* tlbsync is not implemented on 601 */

#if !defined(CONFIG_SMP) || defined(CONFIG_PPC_BOOK3S_601)

#ifndef CONFIG_SMP

#define TLBSYNC

#else

#define TLBSYNC		tlbsync; sync

arch/powerpc/include/asm/ptrace.h

+0 −4
Original line number Diff line number Diff line
@@ -243,11 +243,7 @@ static inline void set_trap_norestart(struct pt_regs *regs) 
}



#define arch_has_single_step()	(1)

#ifndef CONFIG_PPC_BOOK3S_601

#define arch_has_block_step()	(true)

#else

#define arch_has_block_step()	(false)

#endif

#define ARCH_HAS_USER_SINGLE_STEP_REPORT



/*

arch/powerpc/include/asm/time.h

+1 −1
Original line number Diff line number Diff line
@@ -39,7 +39,7 @@ struct div_result { 
};



/* Accessor functions for the timebase (RTC on 601) registers. */

#define __USE_RTC()	(IS_ENABLED(CONFIG_PPC_BOOK3S_601))

#define __USE_RTC()	(0)



#ifdef CONFIG_PPC64

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