Commit 8b11dd54 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'edac_updates_for_5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras 

Pull EDAC updates from Borislav Petkov:

 - Fix i10nm_edac loading on some Ice Lake and Tremont/Jacobsville
   steppings due to the offset change of the bus number configuration
   register, by Qiuxu Zhuo.

 - The usual cleanups and fixes all over the place.

* tag 'edac_updates_for_5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
  EDAC/amd64: Remove redundant assignment to variable ret in hw_info_get()
  EDAC/skx: Use the mcmtr register to retrieve close_pg/bank_xor_enable
  EDAC/i10nm: Update driver to support different bus number config register offsets
  EDAC, {skx,i10nm}: Make some configurations CPU model specific
  EDAC/amd8131: Remove defined but not used bridge_str
  EDAC/thunderx: Make symbols static
  MAINTAINERS: Remove sifive_l2_cache.c from EDAC-SIFIVE pattern
  EDAC/xgene: Remove set but not used address local var
  EDAC/armada_xp: Fix some log messages
parents ca1f5df2 2a02ca04

MAINTAINERS

+0 −1
Original line number Diff line number Diff line
@@ -6193,7 +6193,6 @@ M: Yash Shah <yash.shah@sifive.com> 
L:	linux-edac@vger.kernel.org

S:	Supported

F:	drivers/edac/sifive_edac.c

F:	drivers/soc/sifive_l2_cache.c









EDAC-SKYLAKE









M:	Tony Luck <tony.luck@intel.com>
































drivers/edac/amd64_edac.c



+1
−1






























Original line number
Diff line number
Diff line







@@ -3403,7 +3403,7 @@ static const struct attribute_group *amd64_edac_attr_groups[] = {







static int hw_info_get(struct amd64_pvt *pvt)









{









	u16 pci_id1, pci_id2;









	int ret = -EINVAL;









	int ret;



















	if (pvt->fam >= 0x17) {









		pvt->umc = kcalloc(fam_type->max_mcs, sizeof(struct amd64_umc), GFP_KERNEL);
































drivers/edac/amd8131_edac.c



+0
−8






























Original line number
Diff line number
Diff line







@@ -44,14 +44,6 @@ static void edac_pci_write_dword(struct pci_dev *dev, int reg, u32 val32)







			" PCI Access Write Error at 0x%x\n", reg);









}



















static char * const bridge_str[] = {









	[NORTH_A] = "NORTH A",









	[NORTH_B] = "NORTH B",









	[SOUTH_A] = "SOUTH A",









	[SOUTH_B] = "SOUTH B",









	[NO_BRIDGE] = "NO BRIDGE",









};



















/* Support up to two AMD8131 chipsets on a platform */









static struct amd8131_dev_info amd8131_devices[] = {









	{
































drivers/edac/armada_xp_edac.c



+7
−7






























Original line number
Diff line number
Diff line







@@ -78,7 +78,7 @@ struct axp_mc_drvdata {







	char msg[128];









};



















/* derived from "DRAM Address Multiplexing" in the ARAMDA XP Functional Spec */









/* derived from "DRAM Address Multiplexing" in the ARMADA XP Functional Spec */









static uint32_t axp_mc_calc_address(struct axp_mc_drvdata *drvdata,









				    uint8_t cs, uint8_t bank, uint16_t row,









				    uint16_t col)








@@ -160,12 +160,12 @@ static void axp_mc_check(struct mem_ctl_info *mci)







		if (cnt_sbe)









			cnt_sbe--;









		else









			dev_warn(mci->pdev, "inconsistent SBE count detected");









			dev_warn(mci->pdev, "inconsistent SBE count detected\n");









	} else {









		if (cnt_dbe)









			cnt_dbe--;









		else









			dev_warn(mci->pdev, "inconsistent DBE count detected");









			dev_warn(mci->pdev, "inconsistent DBE count detected\n");









	}



















	/* report earlier errors */








@@ -304,7 +304,7 @@ static int axp_mc_probe(struct platform_device *pdev)

















	config = readl(base + SDRAM_CONFIG_REG);









	if (!(config & SDRAM_CONFIG_ECC_MASK)) {









		dev_warn(&pdev->dev, "SDRAM ECC is not enabled");









		dev_warn(&pdev->dev, "SDRAM ECC is not enabled\n");









		return -EINVAL;









	}


















@@ -532,9 +532,9 @@ static int aurora_l2_probe(struct platform_device *pdev)

















	l2x0_aux_ctrl = readl(base + L2X0_AUX_CTRL);









	if (!(l2x0_aux_ctrl & AURORA_ACR_PARITY_EN))









		dev_warn(&pdev->dev, "tag parity is not enabled");









		dev_warn(&pdev->dev, "tag parity is not enabled\n");









	if (!(l2x0_aux_ctrl & AURORA_ACR_ECC_EN))









		dev_warn(&pdev->dev, "data ECC is not enabled");









		dev_warn(&pdev->dev, "data ECC is not enabled\n");



















	dci = edac_device_alloc_ctl_info(sizeof(*drvdata),









					 "cpu", 1, "L", 1, 2, NULL, 0, 0);








@@ -618,7 +618,7 @@ static int __init armada_xp_edac_init(void)

















	res = platform_register_drivers(drivers, ARRAY_SIZE(drivers));









	if (res)









		pr_warn("Aramda XP EDAC drivers fail to register\n");









		pr_warn("Armada XP EDAC drivers fail to register\n");



















	return 0;









}
































drivers/edac/i10nm_base.c



+24
−5






























Original line number
Diff line number
Diff line







@@ -122,10 +122,22 @@ static int i10nm_get_all_munits(void)







	return 0;









}



















static struct res_config i10nm_cfg0 = {









	.type			= I10NM,









	.decs_did		= 0x3452,









	.busno_cfg_offset	= 0xcc,









};



















static struct res_config i10nm_cfg1 = {









	.type			= I10NM,









	.decs_did		= 0x3452,









	.busno_cfg_offset	= 0xd0,









};



















static const struct x86_cpu_id i10nm_cpuids[] = {









	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D,	NULL),









	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X,		NULL),









	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D,		NULL),









	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D,	&i10nm_cfg0),









	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X,		&i10nm_cfg0),









	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D,		&i10nm_cfg1),









	{}









};









MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);








@@ -161,7 +173,7 @@ static int i10nm_get_dimm_config(struct mem_ctl_info *mci)







				 mtr, mcddrtcfg, imc->mc, i, j);



















			if (IS_DIMM_PRESENT(mtr))









				ndimms += skx_get_dimm_info(mtr, 0, dimm,









				ndimms += skx_get_dimm_info(mtr, 0, 0, dimm,









							    imc, i, j);









			else if (IS_NVDIMM_PRESENT(mcddrtcfg, j))









				ndimms += skx_get_nvdimm_info(dimm, imc, i, j,








@@ -234,6 +246,7 @@ static int __init i10nm_init(void)







{









	u8 mc = 0, src_id = 0, node_id = 0;









	const struct x86_cpu_id *id;









	struct res_config *cfg;









	const char *owner;









	struct skx_dev *d;









	int rc, i, off[3] = {0xd0, 0xc8, 0xcc};








@@ -249,11 +262,17 @@ static int __init i10nm_init(void)







	if (!id)









		return -ENODEV;



















	cfg = (struct res_config *)id->driver_data;



















	/* Newer steppings have different offset for ATOM_TREMONT_D/ICELAKE_X */









	if (boot_cpu_data.x86_stepping >= 4)









		cfg->busno_cfg_offset = 0xd0;



















	rc = skx_get_hi_lo(0x09a2, off, &tolm, &tohm);









	if (rc)









		return rc;



















	rc = skx_get_all_bus_mappings(0x3452, 0xcc, I10NM, &i10nm_edac_list);









	rc = skx_get_all_bus_mappings(cfg, &i10nm_edac_list);









	if (rc < 0)









		goto fail;









	if (rc == 0) {








































































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