mxc gpio: CONFIG_ARCH_* -> cpu_is_*() (8afaada2) · Commits · 戴 / test

arch/arm/plat-mxc/gpio.c

+11 −14

Original line number	Diff line number	Diff line
		@@ -162,7 +162,6 @@ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat)
		}
		}

		#if defined(CONFIG_ARCH_MX3) \|\| defined(CONFIG_ARCH_MX1)
		/* MX1 and MX3 has one interrupt per gpio port */
		static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc)
		{
		@@ -174,9 +173,7 @@ static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc)

		mxc_gpio_irq_handler(port, irq_stat);
		}
		#endif

		#ifdef CONFIG_ARCH_MX2
		/* MX2 has one interrupt for all gpio ports */
		static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc)
		{
		@@ -195,7 +192,6 @@ static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc)
		mxc_gpio_irq_handler(&port[i], irq_stat);
		}
		}
		#endif

		static struct irq_chip gpio_irq_chip = {
		.ack = gpio_ack_irq,
		@@ -284,17 +280,18 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
		/* its a serious configuration bug when it fails */
		BUG_ON( gpiochip_add(&port[i].chip) < 0 );

		#if defined(CONFIG_ARCH_MX3) \|\| defined(CONFIG_ARCH_MX1)
		if (cpu_is_mx1() \|\| cpu_is_mx3()) {
		/* setup one handler for each entry */
		set_irq_chained_handler(port[i].irq, mx3_gpio_irq_handler);
		set_irq_data(port[i].irq, &port[i]);
		#endif
		}
		}

		#ifdef CONFIG_ARCH_MX2
		if (cpu_is_mx2()) {
		/* setup one handler for all GPIO interrupts */
		set_irq_chained_handler(port[0].irq, mx2_gpio_irq_handler);
		set_irq_data(port[0].irq, port);
		#endif
		}

		return 0;
		}