Commit 8ad382dd authored Feb 04, 2019 by Reinette Chatre Committed by Borislav Petkov Feb 05, 2019

x86/resctrl: Remove duplicate MSR_MISC_FEATURE_CONTROL definition



The definition of MSR_MISC_FEATURE_CONTROL was first introduced in

  98af7459 ("x86 msr_index.h: Define MSR_MISC_FEATURE_CONTROL")

and present in Linux since v4.11.

The Cache Pseudo-Locking code added this duplicate definition in more
recent

  f2a17729 ("x86/intel_rdt: Discover supported platforms via prefetch disable bits"),

available since v4.19.

Remove the duplicate definition from the resctrl subsystem and let that
code obtain the needed definition from the core architecture msr-index.h
instead.

Fixes: f2a17729 ("x86/intel_rdt: Discover supported platforms via prefetch disable bits")
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: gavin.hindman@intel.com
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: jithu.joseph@intel.com
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: x86-ml <x86@kernel.org>
Link: https://lkml.kernel.org/r/ff6b95d9b6ef6f4ac96267f130719ba1af09614b.1549312475.git.reinette.chatre@intel.com

parent 5a064d39

arch/x86/kernel/cpu/resctrl/pseudo_lock.c

+0 −7

Original line number	Diff line number	Diff line
		@@ -33,13 +33,6 @@
		#define CREATE_TRACE_POINTS
		#include "pseudo_lock_event.h"

		/*
		* MSR_MISC_FEATURE_CONTROL register enables the modification of hardware
		* prefetcher state. Details about this register can be found in the MSR
		* tables for specific platforms found in Intel's SDM.
		*/
		#define MSR_MISC_FEATURE_CONTROL 0x000001a4

		/*
		* The bits needed to disable hardware prefetching varies based on the
		* platform. During initialization we will discover which bits to use.

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