Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6

        char ctx[];

    };

    static struct sdesc init_sdesc(struct crypto_shash *alg)

    static struct sdesc *init_sdesc(struct crypto_shash *alg)

    {

        struct sdesc sdesc;

        struct sdesc *sdesc;

        int size;

        size = sizeof(struct shash_desc) + crypto_shash_descsize(alg);

        return sdesc;

    }

    static int calc_hash(struct crypto_shashalg,

                 const unsigned chardata, unsigned int datalen,

                 unsigned chardigest) {

        struct sdesc sdesc;

    static int calc_hash(struct crypto_shash *alg,

                 const unsigned char *data, unsigned int datalen,

                 unsigned char *digest)

    {

        struct sdesc *sdesc;

        int ret;

        sdesc = init_sdesc(alg);

        if (IS_ERR(sdesc)) {

            pr_info("trusted_key: can't alloc %s\n", hash_alg);

            pr_info("can't alloc sdesc\n");

            return PTR_ERR(sdesc);

        }

        return ret;

    }

    static int test_hash(const unsigned char *data, unsigned int datalen,

                 unsigned char *digest)

    {

        struct crypto_shash *alg;

        char *hash_alg_name = "sha1-padlock-nano";

        int ret;

        alg = crypto_alloc_shash(hash_alg_name, CRYPTO_ALG_TYPE_SHASH, 0);

        if (IS_ERR(alg)) {

                pr_info("can't alloc alg %s\n", hash_alg_name);

                return PTR_ERR(alg);

        }

        ret = calc_hash(alg, data, datalen, digest);

        crypto_free_shash(alg);

        return ret;

    }

Code Example For Random Number Generator Usage

----------------------------------------------

    static int get_random_numbers(u8 *buf, unsigned int len)

    {

        struct crypto_rngrng = NULL;

        chardrbg = "drbg_nopr_sha256"; /* Hash DRBG with SHA-256, no PR */

        struct crypto_rng *rng = NULL;

        char *drbg = "drbg_nopr_sha256"; /* Hash DRBG with SHA-256, no PR */

        int ret;

        if (!buf || !len) {

        rng = crypto_alloc_rng(drbg, 0, 0);

        if (IS_ERR(rng)) {

            pr_debug("could not allocate RNG handle for %s\n", drbg);

            return -PTR_ERR(rng);

            return PTR_ERR(rng);

        }

        ret = crypto_rng_get_bytes(rng, buf, len);

operations of the kernel which would defeat the speed gains obtained

from the zero-copy interface.

The system-interent limit for the size of one zero-copy operation is 16

The system-inherent limit for the size of one zero-copy operation is 16

pages. If more data is to be sent to AF_ALG, user space must slice the

input into segments with a maximum size of 16 pages.

Inside Secure SafeXcel cryptographic engine

Required properties:

- compatible: Should be "inside-secure,safexcel-eip197".

- reg: Base physical address of the engine and length of memory mapped region.

- interrupts: Interrupt numbers for the rings and engine.

- interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem".

Optional properties:

- clocks: Reference to the crypto engine clock.

- dma-mask: The address mask limitation. Defaults to 64.

Example:

	crypto: crypto@800000 {

		compatible = "inside-secure,safexcel-eip197";

		reg = <0x800000 0x200000>;

		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3",

				  "eip";

		clocks = <&cpm_syscon0 1 26>;

		dma-mask = <0xff 0xffffffff>;

		status = "disabled";

	};

- interrupts: Should contain the five crypto engines interrupts in numeric

	order. These are global system and four descriptor rings.

- clocks: the clock used by the core

- clock-names: the names of the clock listed in the clocks property. These are

	"ethif", "cryp"

- clock-names: Must contain "cryp".

- power-domains: Must contain a reference to the PM domain.

			     <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>;

		clocks = <&topckgen CLK_TOP_ETHIF_SEL>,

			 <&ethsys CLK_ETHSYS_CRYPTO>;

		clock-names = "ethif","cryp";

		clocks = <&ethsys CLK_ETHSYS_CRYPTO>;

		clock-names = "cryp";

		power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;

	};

found in Mediatek SoC family

Required properties:

- compatible	    : Should be "mediatek,mt7623-rng"

- compatible	    : Should be

			"mediatek,mt7622-rng", 	"mediatek,mt7623-rng" : for MT7622

			"mediatek,mt7623-rng" : for MT7623

- clocks	    : list of clock specifiers, corresponding to

		      entries in clock-names property;

- clock-names	    : Should contain "rng" entries;