Commit 8a385eb5 authored by Johan Jonker's avatar Johan Jonker Committed by Heiko Stuebner
Browse files

ARM: dts: rockchip: fix rockchip,default-sample-phase property names



A test with the command below does not detect all errors
in combination with 'additionalProperties: false' and
allOf:
  - $ref: "synopsys-dw-mshc-common.yaml#"
allOf:
  - $ref: "mmc-controller.yaml#"

'additionalProperties' applies to all properties that are not
accounted-for by 'properties' or 'patternProperties' in
the immediate schema.

First when we combine rockchip-dw-mshc.yaml,
synopsys-dw-mshc-common.yaml and mmc-controller.yaml it gives
for example this error:

arch/arm/boot/dts/rk3036-evb.dt.yaml: mmc@1021c000:
'default-sample-phase' does not match any of the regexes:
'^.*@[0-9]+$', '^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|
uhs-(sdr(12|25|50|104)|ddr50))$', 'pinctrl-[0-9]+'

'default-sample-phase' is not a valid property name for mmc nodes.
Fix this error by renaming it to 'rockchip,default-sample-phase'.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml

Signed-off-by: default avatarJohan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200307134841.13803-2-jbx6244@gmail.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 9cd568dc
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+1 −1
Original line number Diff line number Diff line
@@ -319,7 +319,7 @@
	bus-width = <4>;
	cap-sd-highspeed;
	cap-sdio-irq;
	default-sample-phase = <90>;
	rockchip,default-sample-phase = <90>;
	keep-power-in-suspend;
	mmc-pwrseq = <&sdio_pwrseq>;
	non-removable;
+1 −1
Original line number Diff line number Diff line
@@ -263,7 +263,7 @@
		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
		default-sample-phase = <158>;
		rockchip,default-sample-phase = <158>;
		disable-wp;
		dmas = <&pdma 12>;
		dma-names = "rx-tx";
+1 −1
Original line number Diff line number Diff line
@@ -698,7 +698,7 @@
			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
		bus-width = <8>;
		default-sample-phase = <158>;
		rockchip,default-sample-phase = <158>;
		fifo-depth = <0x100>;
		pinctrl-names = "default";
		pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;