KVM: X86: Delay read msr data iff writes ICR MSR (8a1038de) · Commits · 戴 / test

Delay read msr data until we identify guest accesses ICR MSR to avoid to penalize all other MSR writes. Signed-off-by:

Wanpeng Li <wanpengli@tencent.com> Message-Id: <1585189202-1708-2-git-send-email-wanpengli@tencent.com> Signed-off-by:

arch/x86/kvm/x86.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -1595,11 +1595,12 @@ static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data
		enum exit_fastpath_completion handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
		{
		u32 msr = kvm_rcx_read(vcpu);
		u64 data = kvm_read_edx_eax(vcpu);
		u64 data;
		int ret = 0;

		switch (msr) {
		case APIC_BASE_MSR + (APIC_ICR >> 4):
		data = kvm_read_edx_eax(vcpu);
		ret = handle_fastpath_set_x2apic_icr_irqoff(vcpu, data);
		break;
		default: