Commit 89d63fe1 authored by Atsushi Nemoto's avatar Atsushi Nemoto Committed by Ralf Baechle
Browse files

[MIPS] TXx9: Reorganize PCI code 



Split out PCIC dependent code and SoC dependent code from board dependent
code.  Now TX4927 PCIC code is independent from TX4927/TX4938 SoC code.
Also fix some build problems on CONFIG_PCI=n.

As a bonus, "FPCIB0 Backplane Support" is available for all TX39/TX49 boards
and PCI66 support is available for all TX49 boards.

Signed-off-by: default avatarAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 22b1d707

arch/mips/Kconfig

+2 −1
Original line number Diff line number Diff line
@@ -575,7 +575,7 @@ config TOSHIBA_RBTX4927 
	select HW_HAS_PCI

	select IRQ_CPU

	select IRQ_TXX9

	select I8259 if TOSHIBA_FPCIB0

	select PCI_TX4927

	select SWAP_IO_SPACE

	select SYS_HAS_CPU_TX49XX

	select SYS_SUPPORTS_32BIT_KERNEL
@@ -598,6 +598,7 @@ config TOSHIBA_RBTX4938 
	select HW_HAS_PCI

	select IRQ_CPU

	select IRQ_TXX9

	select PCI_TX4927

	select SWAP_IO_SPACE

	select SYS_HAS_CPU_TX49XX

	select SYS_SUPPORTS_32BIT_KERNEL

arch/mips/pci/Makefile

+5 −3
Original line number Diff line number Diff line
@@ -15,6 +15,8 @@ obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o 
obj-$(CONFIG_PCI_VR41XX)	+= ops-vr41xx.o pci-vr41xx.o

obj-$(CONFIG_NEC_CMBVR4133)	+= fixup-vr4133.o

obj-$(CONFIG_MARKEINS)		+= ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o

obj-$(CONFIG_PCI_TX3927)	+= ops-tx3927.o

obj-$(CONFIG_PCI_TX4927)	+= ops-tx4927.o



#

# These are still pretty much in the old state, watch, go blind.
@@ -41,9 +43,9 @@ obj-$(CONFIG_SNI_RM) += fixup-sni.o ops-sni.o 
obj-$(CONFIG_TANBAC_TB0219)	+= fixup-tb0219.o

obj-$(CONFIG_TANBAC_TB0226)	+= fixup-tb0226.o

obj-$(CONFIG_TANBAC_TB0287)	+= fixup-tb0287.o

obj-$(CONFIG_TOSHIBA_JMR3927)	+= fixup-jmr3927.o pci-jmr3927.o

obj-$(CONFIG_TOSHIBA_RBTX4927)	+= fixup-rbtx4927.o ops-tx4927.o

obj-$(CONFIG_TOSHIBA_RBTX4938)	+= fixup-rbtx4938.o ops-tx4938.o

obj-$(CONFIG_TOSHIBA_JMR3927)	+= fixup-jmr3927.o

obj-$(CONFIG_TOSHIBA_RBTX4927)	+= fixup-rbtx4927.o pci-tx4927.o pci-tx4938.o

obj-$(CONFIG_TOSHIBA_RBTX4938)	+= fixup-rbtx4938.o pci-tx4938.o

obj-$(CONFIG_VICTOR_MPC30X)	+= fixup-mpc30x.o

obj-$(CONFIG_ZAO_CAPCELLA)	+= fixup-capcella.o

obj-$(CONFIG_WR_PPMC)		+= fixup-wrppmc.o

arch/mips/pci/fixup-jmr3927.c

+9 −16
Original line number Diff line number Diff line
@@ -28,35 +28,30 @@ 
 *  675 Mass Ave, Cambridge, MA 02139, USA.

 */

#include <linux/types.h>

#include <linux/pci.h>

#include <linux/init.h>



#include <asm/txx9/pci.h>

#include <asm/txx9/jmr3927.h>



int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)

{

	unsigned char irq = pin;



	/* SMSC SLC90E66 IDE uses irq 14, 15 (default) */

	if (dev->vendor == PCI_VENDOR_ID_EFAR &&

	    dev->device == PCI_DEVICE_ID_EFAR_SLC90E66_1)

		return irq;

	/* IRQ rotation (PICMG) */

	irq--;			/* 0-3 */

	if (dev->bus->parent == NULL &&

	    slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {

	if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {

		/* PCI CardSlot (IDSEL=A23, DevNu=12) */

		/* PCIA => PCIC (IDSEL=A23) */

		/* NOTE: JMR3927 JP1 must be set to OPEN */

		irq = (irq + 2) % 4;

	} else if (dev->bus->parent == NULL &&

		   slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {

	} else if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {

		/* PCI CardSlot (IDSEL=A22, DevNu=11) */

		/* PCIA => PCIA (IDSEL=A22) */

		/* NOTE: JMR3927 JP1 must be set to OPEN */

		irq = (irq + 0) % 4;

	} else {

		/* PCI Backplane */

		if (txx9_pci_option & TXX9_PCI_OPT_PICMG)

			irq = (irq + 33 - slot) % 4;

		else

			irq = (irq + 3 + slot) % 4;

	}

	irq++;			/* 1-4 */
@@ -66,15 +61,13 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 
		irq = JMR3927_IRQ_IOC_PCIA;

		break;

	case 2:

		// wrong for backplane irq = JMR3927_IRQ_IOC_PCIB;

		irq = JMR3927_IRQ_IOC_PCID;

		irq = JMR3927_IRQ_IOC_PCIB;

		break;

	case 3:

		irq = JMR3927_IRQ_IOC_PCIC;

		break;

	case 4:

		// wrong for backplane irq = JMR3927_IRQ_IOC_PCID;

		irq = JMR3927_IRQ_IOC_PCIB;

		irq = JMR3927_IRQ_IOC_PCID;

		break;

	}

arch/mips/pci/fixup-rbtx4927.c

+26 −86
Original line number Diff line number Diff line
@@ -33,102 +33,42 @@ 
 *  675 Mass Ave, Cambridge, MA 02139, USA.

 */

#include <linux/types.h>

#include <linux/pci.h>

#include <linux/kernel.h>

#include <linux/init.h>

#include <asm/txx9/pci.h>

#include <asm/txx9/rbtx4927.h>



#include <asm/txx9/tx4927.h>



#undef  DEBUG

#ifdef  DEBUG

#define DBG(x...)       printk(x)

#else

#define DBG(x...)

#endif



/* look up table for backplane pci irq for slots 17-20 by pin # */

static unsigned char backplane_pci_irq[4][4] = {

	/* PJ6 SLOT:  17, PIN: 1 */ {TX4927_IRQ_IOC_PCIA,

				     /* PJ6 SLOT:  17, PIN: 2 */

				     TX4927_IRQ_IOC_PCIB,

				     /* PJ6 SLOT:  17, PIN: 3 */

				     TX4927_IRQ_IOC_PCIC,

				     /* PJ6 SLOT:  17, PIN: 4 */

				     TX4927_IRQ_IOC_PCID},

	/* SB  SLOT:  18, PIN: 1 */ {TX4927_IRQ_IOC_PCIB,

				     /* SB  SLOT:  18, PIN: 2 */

				     TX4927_IRQ_IOC_PCIC,

				     /* SB  SLOT:  18, PIN: 3 */

				     TX4927_IRQ_IOC_PCID,

				     /* SB  SLOT:  18, PIN: 4 */

				     TX4927_IRQ_IOC_PCIA},

	/* PJ5 SLOT:  19, PIN: 1 */ {TX4927_IRQ_IOC_PCIC,

				     /* PJ5 SLOT:  19, PIN: 2 */

				     TX4927_IRQ_IOC_PCID,

				     /* PJ5 SLOT:  19, PIN: 3 */

				     TX4927_IRQ_IOC_PCIA,

				     /* PJ5 SLOT:  19, PIN: 4 */

				     TX4927_IRQ_IOC_PCIB},

	/* PJ4 SLOT:  20, PIN: 1 */ {TX4927_IRQ_IOC_PCID,

				     /* PJ4 SLOT:  20, PIN: 2 */

				     TX4927_IRQ_IOC_PCIA,

				     /* PJ4 SLOT:  20, PIN: 3 */

				     TX4927_IRQ_IOC_PCIB,

				     /* PJ4 SLOT:  20, PIN: 4 */

				     TX4927_IRQ_IOC_PCIC}

};



static int pci_get_irq(const struct pci_dev *dev, int pin)

int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)

{

	unsigned char irq = pin;



	DBG("pci_get_irq: pin is %d\n", pin);

	/* IRQ rotation */

	irq--;			/* 0-3 */

	if (dev->bus->parent == NULL &&

	    PCI_SLOT(dev->devfn) == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {

		printk("Onboard PCI_SLOT(dev->devfn) is %d\n",

		       PCI_SLOT(dev->devfn));

		/* IDSEL=A23 is tx4927 onboard pci slot */

		irq = (irq + PCI_SLOT(dev->devfn)) % 4;

	if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {

		/* PCI CardSlot (IDSEL=A23) */

		/* PCIA => PCIA */

		irq = (irq + 0 + slot) % 4;

	} else {

		/* PCI Backplane */

		if (txx9_pci_option & TXX9_PCI_OPT_PICMG)

			irq = (irq + 33 - slot) % 4;

		else

			irq = (irq + 3 + slot) % 4;

	}

	irq++;	/* 1-4 */

		DBG("irq is now %d\n", irq);



	switch (irq) {

	case 1:

			irq = TX4927_IRQ_IOC_PCIA;

		irq = RBTX4927_IRQ_IOC_PCIA;

		break;

	case 2:

			irq = TX4927_IRQ_IOC_PCIB;

		irq = RBTX4927_IRQ_IOC_PCIB;

		break;

	case 3:

			irq = TX4927_IRQ_IOC_PCIC;

		irq = RBTX4927_IRQ_IOC_PCIC;

		break;

	case 4:

			irq = TX4927_IRQ_IOC_PCID;

		irq = RBTX4927_IRQ_IOC_PCID;

		break;

	}

	} else {

		/* PCI Backplane */

		DBG("PCI Backplane PCI_SLOT(dev->devfn) is %d\n",

		    PCI_SLOT(dev->devfn));

		irq = backplane_pci_irq[PCI_SLOT(dev->devfn) - 17][irq];

	}

	DBG("assigned irq %d\n", irq);

	return irq;

}



int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)

{

	unsigned char irq;



	printk("PCI Setup for pin %d \n", pin);



	if (dev->device == 0x9130) /* IDE */

		irq = 14;

	else

		irq = pci_get_irq(dev, pin);



	return irq;

}

arch/mips/pci/fixup-rbtx4938.c

+11 −41
Original line number Diff line number Diff line
@@ -10,45 +10,28 @@ 
 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)

 */

#include <linux/types.h>

#include <linux/pci.h>

#include <linux/kernel.h>

#include <linux/init.h>



#include <asm/txx9/pci.h>

#include <asm/txx9/rbtx4938.h>



extern struct pci_controller tx4938_pci_controller[];



static int pci_get_irq(const struct pci_dev *dev, int pin)

int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)

{

	int irq = pin;

	u8 slot = PCI_SLOT(dev->devfn);

	struct pci_controller *controller = (struct pci_controller *)dev->sysdata;



	if (controller == &tx4938_pci_controller[1]) {

		/* TX4938 PCIC1 */

		switch (slot) {

		case TX4938_PCIC_IDSEL_AD_TO_SLOT(31):

			if (tx4938_ccfgptr->pcfg & TX4938_PCFG_ETH0_SEL)

				return RBTX4938_IRQ_IRC + TX4938_IR_ETH0;

			break;

		case TX4938_PCIC_IDSEL_AD_TO_SLOT(30):

			if (tx4938_ccfgptr->pcfg & TX4938_PCFG_ETH1_SEL)

				return RBTX4938_IRQ_IRC + TX4938_IR_ETH1;

			break;

		}

		return 0;

	}

	int irq = tx4938_pcic1_map_irq(dev, slot);



	if (irq >= 0)

		return irq;

	irq = pin;

	/* IRQ rotation */

	irq--;	/* 0-3 */

	if (dev->bus->parent == NULL &&

	    (slot == TX4938_PCIC_IDSEL_AD_TO_SLOT(23))) {

	if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {

		/* PCI CardSlot (IDSEL=A23) */

		/* PCIA => PCIA (IDSEL=A23) */

		irq = (irq + 0 + slot) % 4;

	} else {

		/* PCI Backplane */

		if (txx9_pci_option & TXX9_PCI_OPT_PICMG)

			irq = (irq + 33 - slot) % 4;

		else

			irq = (irq + 3 + slot) % 4;

	}

	irq++;	/* 1-4 */
@@ -69,19 +52,6 @@ static int pci_get_irq(const struct pci_dev *dev, int pin) 
	return irq;

}



int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)

{

	unsigned char irq = 0;



	irq = pci_get_irq(dev, pin);



	printk(KERN_INFO "PCI: 0x%02x:0x%02x(0x%02x,0x%02x) IRQ=%d\n",

	       dev->bus->number, dev->devfn, PCI_SLOT(dev->devfn),

	       PCI_FUNC(dev->devfn), irq);



	return irq;

}



/*

 * Do platform specific device initialization at pci_enable_device() time

 */

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