+13
−0
+1
−0
drivers/bus/simple-pm-bus.c
0 → 100644
+58
−0
Loading
Gitlab 现已全面支持 git over ssh 与 git over https。通过 HTTPS 访问请配置带有 read_repository / write_repository 权限的 Personal access token。通过 SSH 端口访问请使用 22 端口或 13389 端口。如果使用CAS注册了账户但不知道密码,可以自行至设置中更改;如有其他问题,请发邮件至 service@cra.moe 寻求协助。
Add a driver for transparent busses that don't need a real driver, but where the bus controller is part of a PM domain, or under the control of a functional clock. Typically, the bus controller's PM domain and/or clock must be enabled for child devices connected to the bus (either on-SoC or externally) to function. Hence the sole purpose of this driver is to enable its clock and PM domain (if exist(s)), which are specified in the DT and managed from platform and PM domain code, and to probe for child devices. Due to the child-parent relationship with devices connected to the bus, PM domain and clock state transitions are handled in the correct order. Signed-off-by:Geert Uytterhoeven <geert+renesas@glider.be> Tested-by:
Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by:
Kevin Hilman <khilman@linaro.org> Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
CRA Git | Maintained and supported by SUSTech CRA and CCSE