Commit 89cd5a02 authored by Joseph Gravenor's avatar Joseph Gravenor Committed by Alex Deucher
Browse files

drm/amd/display: update p-state latency for renoir when using lpddr4



[Why]
DF team has produced more optimized latency numbers, for lpddr4

[How]
change the p-state laency in the lpddr4 wm table to the new latency
number

Signed-off-by: default avatarJoseph Gravenor <joseph.gravenor@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2853ecc6
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+4 −4
Original line number Diff line number Diff line
@@ -562,7 +562,7 @@ struct wm_table lpddr4_wm_table = {
		{
			.wm_inst = WM_A,
			.wm_type = WM_TYPE_PSTATE_CHG,
			.pstate_latency_us = 23.84,
			.pstate_latency_us = 11.65333,
			.sr_exit_time_us = 12.5,
			.sr_enter_plus_exit_time_us = 17.0,
			.valid = true,
@@ -570,7 +570,7 @@ struct wm_table lpddr4_wm_table = {
		{
			.wm_inst = WM_B,
			.wm_type = WM_TYPE_PSTATE_CHG,
			.pstate_latency_us = 23.84,
			.pstate_latency_us = 11.65333,
			.sr_exit_time_us = 12.5,
			.sr_enter_plus_exit_time_us = 17.0,
			.valid = true,
@@ -578,7 +578,7 @@ struct wm_table lpddr4_wm_table = {
		{
			.wm_inst = WM_C,
			.wm_type = WM_TYPE_PSTATE_CHG,
			.pstate_latency_us = 23.84,
			.pstate_latency_us = 11.65333,
			.sr_exit_time_us = 12.5,
			.sr_enter_plus_exit_time_us = 17.0,
			.valid = true,
@@ -586,7 +586,7 @@ struct wm_table lpddr4_wm_table = {
		{
			.wm_inst = WM_D,
			.wm_type = WM_TYPE_PSTATE_CHG,
			.pstate_latency_us = 23.84,
			.pstate_latency_us = 11.65333,
			.sr_exit_time_us = 12.5,
			.sr_enter_plus_exit_time_us = 17.0,
			.valid = true,