Commit 89910e62 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-2019-10-21' of git://anongit.freedesktop.org/drm/drm-intel into drm-next 

UAPI Changes:

- Introduce a versioning of the i915-perf uapi (Lionel)
- Add support for perf configuration queries (Lionel)

  Allow listing perf configurations with IOCTL in addition
  to sysfs. This is useful in container usecases.

- Allow dynamic reconfiguration of the OA stream (Chris)

  Allows the OA stream to be reconfigured between
  batch buffers, giving greater flexibility in sampling.

- Allow holding preemption on filtered perf ctx

  Allow CAP_ADMIN to block pre-emption of a context
  to query performance counters without disturbances.

  Mesa changes: https://gitlab.freedesktop.org/mesa/mesa/merge_requests/932

Cross-subsystem Changes:

- drm-next backmerge for HDR DP changes
  https://lists.freedesktop.org/archives/dri-devel/2019-September/236453.html



Driver Changes:

- Add DC3CO sleep state for Tigerlake (Anshuman)
- Tigerlake BCS engine support engine relative MMIO (Daniele)
- Simplify the Tigerlake LRC register list for !RCS (Daniele)
- Read SAGV block time from PCODE on Tigerlake (James)
- Add 12 missing Tigerlake workarounds (Mika)
- Enable DDI/Port G for Tigerlake (Khaled)

- Avoid hang in tsg,vfe units by keeping l3 clocks ICL+(Mika)
- Fix Bugzilla #111966: Favor last VBT child device (Ville)
- Fix blue/black screen on boot due to broken gamma (Swati)
- Add support of BT.2020 Colorimetry to DP MSA (Gwan-gyeong)
- Attach colorspace property to DP connector (Gwan-gyeong)
- Attach HDR metadata property to DP connector (Gwan-gyeong)
- Base intel_memory_region support prep for local memory (Matt A)
- Introduce Jasper Lake PCH (Matt R)
- Support multiple GPUs in PMU (Tvrtko)
- Fix MST oops due to MSA changes (Ville)
- Refuse modes with hdisplay==4096 on pre-HSW DP (Ville)
- Correct the PCH type in irq postinstall for JSP (Vivek)
- Save Master transcoder in slave's crtc_state for Transcoder Port Sync (Manasi)
- Enable TRANSCODER PORT SYNC for tiled displays across separate ports (Manasi)
- HW state readout for transcoder port sync config (Manasi)
- Enable master-slaves in trans port sync (Manasi)
- In port sync mode disable slaves first then master (Manasi)
- Fix port checks for MST support on gen >= 11 (Lucas)

- Flush submission tasklet before waiting/retiring (Chris)
- Flush tasklet submission before sleeping on i915_request_wait (Chris)
- Object pin reference counting fixes (Chris, Matt A)
- Clear semaphore immediately upon ELSP promotion (Chris)
- Child device size remains unchanged through VBT 229 (Matt R)
- Restore dropped 'interruptible' flag on retiring requests (Chris)
- Treat a busy timeline as 'active' while waiting (Chris)
- Clean up struct_mutex from perf (Chris)
- Update locking around execlists->active (Chris)
- Mark up expected execlist state during reset (Chris)
- Remove cursor use of properties for coordinates (Maarten)
- Only mark incomplete requests as -EIO on cancelling (Chris)
- Add an rcu_barrier option to i915_drop_caches (Chris)
- Replace perf global wakeref tracking with engine-pm (Chris)
- Prevent merging requests with conflicting flags (Chris)
- Allow for CS OA configs to be created lazily (Lionel)
- Implement active wait for noa configurations (Lionel)
- Execute OA configuration from command stream (Lionel)
- Prefer using the pinned_ctx for emitting delays on config (Chris)
- Port C's hotplug interrupt is associated with TC1 bits (Vivek, Matt R)
- Extend program of VSC Header and DB for Colorimetry Format (Gwan-gyeong)
- Fine-tune timeslicing of contexts (Chris)
- Do initial mocs configuration directly (Chris)
- Fix uninitialized variable on PMU error path (Tvrtko)
- Don't disable interrupts independently of the locking (Sebastian)
- Eliminate struct_mutext from GVT (Chris)

- Move perf types to their own header (Lionel)
- Drop list of perf streams (always size 1) (Lionel)
- Store the perf associated engine of a stream (Lionel)
- Make array hw_engine_mask static (Colin)
- Prefer shortest path to RPM/perf/GT instead of dev_priv (Chris, Tvrtko)
- Virtual request submission fixes (Chris)
- Selftest/CI improvements (Chris)
- Fix Kconfig indentation (Krzysztof)
- Give engine->kernel_context distinct timeline lock classes (Chris)
- Fix null pointer deref on selftest error path (Colin)
- Select DPLL's via mask (Matt R)
- Introduce and use intel_atomic_crtc_state_for_each_plane_state (Maarten)
- Use intel_plane_state in prepare and cleanup plane_fb (Maarten)
- Remove begin/finish_crtc_commit (Maarten)
- Move SAGV block time to dev_priv (James)
- Avoid polluting the i915_oa_config with error pointers (Chris)
- Squelch display kerneldoc warnings (Chris)
- Assert tasklet is locked for process_csb() (Chris)
- Switch to using DP_MSA_MISC_* defines (Ville)
- Stop using drm_atomic_helper_check_planes() (Ville)
- Make .modeset_calc_cdclk() mandatory (Ville)
- Use drm_rect_translate_to()/drm_rect_init() (Ville)
- Refactor timestamping constants update (Ville)
- Switch intel_legacy_cursor_update() to intel_ types (Ville)
- Prepare the connector/encoder mask readout for hw vs. uapi state split (Ville)
- Prepare the mode readout for hw vs. uapi state split (Ville)
- Move swizzle_bit under i915_ggtt (Chris)
- Improve microcontrollers documentation (Daniele)
- Move the cursor rotation handling into intel_cursor_check_surface() (Ville)
- Cleanups to pipe code (Ville)
- Shrink eDRAM ways/sets arrays for code size (Ville)
- Cleanups to HDCP2 timeout code (Ville)
- Restore full symmetry in i915_driver_modeset_probe/remove (Janusz)
- Simplify setting of ddi_io_power_domain (Lucas)
- Add pipe id/name to pipe mismatch logs (Lucas)
- Prettify MST debug message (Lucas)
- Extract GT ring management to separate files (Andi)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191021180337.GA24338@jlahtine-desk.ger.corp.intel.com
parents 7ed09360 ce53908b

Documentation/gpu/i915.rst

+42 −6
Original line number Diff line number Diff line
@@ -415,6 +415,15 @@ Object Tiling IOCTLs 
.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_tiling.c

   :doc: buffer object tiling



Microcontrollers

================



Starting from gen9, three microcontrollers are available on the HW: the

graphics microcontroller (GuC), the HEVC/H.265 microcontroller (HuC) and the

display microcontroller (DMC). The driver is responsible for loading the

firmwares on the microcontrollers; the GuC and HuC firmwares are transferred

to WOPCM using the DMA engine, while the DMC firmware is written through MMIO.



WOPCM

-----
@@ -427,12 +436,24 @@ WOPCM Layout 
GuC

---



Firmware Layout

~~~~~~~~~~~~~~~

.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.c

   :doc: GuC



GuC Firmware Layout

~~~~~~~~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h

   :doc: Firmware Layout



GuC Memory Management

~~~~~~~~~~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.c

   :doc: GuC Memory Management

.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.c

   :functions: intel_guc_allocate_vma





GuC-specific firmware loader

~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -448,11 +469,26 @@ GuC-based command submission 
.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

   :internal:



GuC Address Space

~~~~~~~~~~~~~~~~~

HuC

---

.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_huc.c

   :doc: HuC

.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_huc.c

   :functions: intel_huc_auth



HuC Memory Management

~~~~~~~~~~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.c

   :doc: GuC Address Space

.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_huc.c

   :doc: HuC Memory Management



HuC Firmware Layout

~~~~~~~~~~~~~~~~~~~

The HuC FW layout is the same as the GuC one, see `GuC Firmware Layout`_



DMC

---

See `CSR firmware support for DMC`_



Tracing

=======

drivers/gpu/drm/i915/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -51,6 +51,7 @@ i915-y += i915_drv.o \ 
	  i915_utils.o \

	  intel_csr.o \

	  intel_device_info.o \

	  intel_memory_region.o \

	  intel_pch.o \

	  intel_pm.o \

	  intel_runtime_pm.o \
@@ -86,6 +87,7 @@ gt-y += \ 
	gt/intel_gt_pm_irq.o \

	gt/intel_gt_requests.o \

	gt/intel_hangcheck.o \

	gt/intel_llc.o \

	gt/intel_lrc.o \

	gt/intel_rc6.o \

	gt/intel_renderstate.o \
@@ -121,6 +123,7 @@ gem-y += \ 
	gem/i915_gem_pages.o \

	gem/i915_gem_phys.o \

	gem/i915_gem_pm.o \

	gem/i915_gem_region.o \

	gem/i915_gem_shmem.o \

	gem/i915_gem_shrinker.o \

	gem/i915_gem_stolen.o \

drivers/gpu/drm/i915/display/intel_atomic_plane.c

+3 −7
Original line number Diff line number Diff line
@@ -195,14 +195,11 @@ get_crtc_from_states(const struct intel_plane_state *old_plane_state, 
	return NULL;

}



static int intel_plane_atomic_check(struct drm_plane *_plane,

				    struct drm_plane_state *_new_plane_state)

int intel_plane_atomic_check(struct intel_atomic_state *state,

			     struct intel_plane *plane)

{

	struct intel_plane *plane = to_intel_plane(_plane);

	struct intel_atomic_state *state =

		to_intel_atomic_state(_new_plane_state->state);

	struct intel_plane_state *new_plane_state =

		to_intel_plane_state(_new_plane_state);

		intel_atomic_get_new_plane_state(state, plane);

	const struct intel_plane_state *old_plane_state =

		intel_atomic_get_old_plane_state(state, plane);

	struct intel_crtc *crtc =
@@ -369,5 +366,4 @@ void i9xx_update_planes_on_crtc(struct intel_atomic_state *state, 
const struct drm_plane_helper_funcs intel_plane_helper_funcs = {

	.prepare_fb = intel_prepare_plane_fb,

	.cleanup_fb = intel_cleanup_plane_fb,

	.atomic_check = intel_plane_atomic_check,

};

drivers/gpu/drm/i915/display/intel_atomic_plane.h

+2 −0
Original line number Diff line number Diff line
@@ -41,6 +41,8 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_ 
					struct intel_crtc_state *crtc_state,

					const struct intel_plane_state *old_plane_state,

					struct intel_plane_state *intel_state);

int intel_plane_atomic_check(struct intel_atomic_state *state,

			     struct intel_plane *plane);

int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_state,

				    struct intel_crtc_state *crtc_state,

				    const struct intel_plane_state *old_plane_state,

drivers/gpu/drm/i915/display/intel_bios.c

+21 −7
Original line number Diff line number Diff line
@@ -1270,7 +1270,7 @@ static void sanitize_ddc_pin(struct drm_i915_private *dev_priv, 
		DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "

			      "disabling port %c DVI/HDMI support\n",

			      port_name(port), info->alternate_ddc_pin,

			      port_name(p), port_name(port));

			      port_name(p), port_name(p));



		/*

		 * If we have multiple ports supposedly sharing the
@@ -1278,9 +1278,14 @@ static void sanitize_ddc_pin(struct drm_i915_private *dev_priv, 
		 * port. Otherwise they share the same ddc bin and

		 * system couldn't communicate with them separately.

		 *

		 * Give child device order the priority, first come first

		 * served.

		 * Give inverse child device order the priority,

		 * last one wins. Yes, there are real machines

		 * (eg. Asrock B250M-HDV) where VBT has both

		 * port A and port E with the same AUX ch and

		 * we must pick port E :(

		 */

		info = &dev_priv->vbt.ddi_port_info[p];



		info->supports_dvi = false;

		info->supports_hdmi = false;

		info->alternate_ddc_pin = 0;
@@ -1316,7 +1321,7 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv, 
		DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "

			      "disabling port %c DP support\n",

			      port_name(port), info->alternate_aux_channel,

			      port_name(p), port_name(port));

			      port_name(p), port_name(p));



		/*

		 * If we have multiple ports supposedlt sharing the
@@ -1324,9 +1329,14 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv, 
		 * port. Otherwise they share the same aux channel

		 * and system couldn't communicate with them separately.

		 *

		 * Give child device order the priority, first come first

		 * served.

		 * Give inverse child device order the priority,

		 * last one wins. Yes, there are real machines

		 * (eg. Asrock B250M-HDV) where VBT has both

		 * port A and port E with the same AUX ch and

		 * we must pick port E :(

		 */

		info = &dev_priv->vbt.ddi_port_info[p];



		info->supports_dp = false;

		info->alternate_aux_channel = 0;

	}
@@ -1389,6 +1399,7 @@ static enum port dvo_port_to_port(u8 dvo_port) 
		[PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1},

		[PORT_E] = { DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},

		[PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1},

		[PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1},

	};

	enum port port;

	int i;
@@ -1615,7 +1626,7 @@ parse_general_definitions(struct drm_i915_private *dev_priv, 
		expected_size = 37;

	} else if (bdb->version <= 215) {

		expected_size = 38;

	} else if (bdb->version <= 216) {

	} else if (bdb->version <= 229) {

		expected_size = 39;

	} else {

		expected_size = sizeof(*child);
@@ -2248,6 +2259,9 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, 
	case DP_AUX_F:

		aux_ch = AUX_CH_F;

		break;

	case DP_AUX_G:

		aux_ch = AUX_CH_G;

		break;

	default:

		MISSING_CASE(info->alternate_aux_channel);

		aux_ch = AUX_CH_A;

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