Commit 8962a5db authored by Nicolin Chen's avatar Nicolin Chen Committed by Shawn Guo
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ARM: imx6sl: Add missing spba clock to clock tree



We are missing spba clock in imx6sl's clock tree, thus add it.

Signed-off-by: default avatarNicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 238fb182
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+1 −0
Original line number Diff line number Diff line
@@ -233,6 +233,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
	clks[IMX6SL_CLK_PWM3]         = imx_clk_gate2("pwm3",         "perclk",            base + 0x78, 20);
	clks[IMX6SL_CLK_PWM4]         = imx_clk_gate2("pwm4",         "perclk",            base + 0x78, 22);
	clks[IMX6SL_CLK_SDMA]         = imx_clk_gate2("sdma",         "ipg",               base + 0x7c, 6);
	clks[IMX6SL_CLK_SPBA]         = imx_clk_gate2("spba",         "ipg",               base + 0x7c, 12);
	clks[IMX6SL_CLK_SPDIF]        = imx_clk_gate2("spdif",        "spdif0_podf",       base + 0x7c, 14);
	clks[IMX6SL_CLK_SSI1]         = imx_clk_gate2("ssi1",         "ssi1_podf",         base + 0x7c, 18);
	clks[IMX6SL_CLK_SSI2]         = imx_clk_gate2("ssi2",         "ssi2_podf",         base + 0x7c, 20);
+2 −1
Original line number Diff line number Diff line
@@ -144,6 +144,7 @@
#define IMX6SL_CLK_USDHC3		131
#define IMX6SL_CLK_USDHC4		132
#define IMX6SL_CLK_PLL4_AUDIO_DIV	133
#define IMX6SL_CLK_END			134
#define IMX6SL_CLK_SPBA			134
#define IMX6SL_CLK_END			135

#endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */