Commit 8947efc0 authored Sep 20, 2020 by Tali Perry Committed by Wolfram Sang Sep 27, 2020

i2c: npcm7xx: Clear LAST bit after a failed transaction.



Due to a HW issue, in some scenarios the LAST bit might remain set.
This will cause an unexpected NACK after reading 16 bytes on the next
read.

Example: if user tries to read from a missing device, get a NACK,
then if the next command is a long read ( > 16 bytes),
the master will stop reading after 16 bytes.
To solve this, if a command fails, check if LAST bit is still
set. If it does, reset the module.

Fixes: 56a1485b (i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver)
Signed-off-by: Tali Perry <tali.perry1@gmail.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>

parent a2bd970a

drivers/i2c/busses/i2c-npcm7xx.c

+9 −0

Original line number	Diff line number	Diff line
		@@ -2163,6 +2163,15 @@ static int npcm_i2c_master_xfer(struct i2c_adapter adap, struct i2c_msg msgs,
		if (bus->cmd_err == -EAGAIN)
		ret = i2c_recover_bus(adap);

		/*
		* After any type of error, check if LAST bit is still set,
		* due to a HW issue.
		* It cannot be cleared without resetting the module.
		*/
		if (bus->cmd_err &&
		(NPCM_I2CRXF_CTL_LAST_PEC & ioread8(bus->reg + NPCM_I2CRXF_CTL)))
		npcm_i2c_reset(bus);

		#if IS_ENABLED(CONFIG_I2C_SLAVE)
		/* reenable slave if it was enabled */
		if (bus->slave)

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