Commit 8925dbd0 authored May 13, 2019 by Jerome Brunet

clk: meson: gxbb: no spread spectrum on mpll0



The documentation says there is an SSEN bit on mpll0 but, after testing
it, no spread spectrum function appears to be enabled by this bit on any
of the MPLLs.

Let's remove it until we know more

Fixes: 1f737ffa ("clk: meson: mpll: fix mpll0 fractional part ignored")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>

parent f9b3eeeb

drivers/clk/meson/gxbb.c

+0 −5

Original line number	Diff line number	Diff line
		@@ -679,11 +679,6 @@ static struct clk_regmap gxbb_mpll0_div = {
		.shift = 16,
		.width = 9,
		},
		.ssen = {
		.reg_off = HHI_MPLL_CNTL,
		.shift = 25,
		.width = 1,
		},
		.lock = &meson_clk_lock,
		},
		.hw.init = &(struct clk_init_data){

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