Commit 89184651 authored by Thierry Reding's avatar Thierry Reding
Browse files

memory: Add NVIDIA Tegra memory controller support 



The memory controller on NVIDIA Tegra exposes various knobs that can be
used to tune the behaviour of the clients attached to it.

Currently this driver sets up the latency allowance registers to the HW
defaults. Eventually an API should be exported by this driver (via a
custom API or a generic subsystem) to allow clients to register latency
requirements.

This driver also registers an IOMMU (SMMU) that's implemented by the
memory controller. It is supported on Tegra30, Tegra114 and Tegra124
currently. Tegra20 has a GART instead.

The Tegra SMMU operates on memory clients and SWGROUPs. A memory client
is a unidirectional, special-purpose DMA master. A SWGROUP represents a
set of memory clients that form a logical functional unit corresponding
to a single device. Typically a device has two clients: one client for
read transactions and one client for write transactions, but there are
also devices that have only read clients, but many of them (such as the
display controllers).

Because there is no 1:1 relationship between memory clients and devices
the driver keeps a table of memory clients and the SWGROUPs that they
belong to per SoC. Note that this is an exception and due to the fact
that the SMMU is tightly integrated with the rest of the Tegra SoC. The
use of these tables is discouraged in drivers for generic IOMMU devices
such as the ARM SMMU because the same IOMMU could be used in any number
of SoCs and keeping such tables for each SoC would not scale.

Acked-by: default avatarJoerg Roedel <jroedel@suse.de>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 4bc567dd

drivers/iommu/Kconfig

+6 −6
Original line number Diff line number Diff line
@@ -163,14 +163,14 @@ config TEGRA_IOMMU_GART 
	  hardware included on Tegra SoCs.



config TEGRA_IOMMU_SMMU

	bool "Tegra SMMU IOMMU Support"

	depends on ARCH_TEGRA && TEGRA_AHB

	bool "NVIDIA Tegra SMMU Support"

	depends on ARCH_TEGRA

	depends on TEGRA_AHB

	depends on TEGRA_MC

	select IOMMU_API

	help

	  Enables support for remapping discontiguous physical memory

	  shared with the operating system into contiguous I/O virtual

	  space through the SMMU (System Memory Management Unit)

	  hardware included on Tegra SoCs.

	  This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra

	  SoCs (Tegra30 up to Tegra124).



config EXYNOS_IOMMU

	bool "Exynos IOMMU Support"

drivers/iommu/tegra-smmu.c

+523 −1087

File changed.

Preview size limit exceeded, changes collapsed.

drivers/memory/Kconfig

+2 −10
Original line number Diff line number Diff line
@@ -61,16 +61,6 @@ config TEGRA20_MC 
	  analysis, especially for IOMMU/GART(Graphics Address

	  Relocation Table) module.



config TEGRA30_MC

	bool "Tegra30 Memory Controller(MC) driver"

	default y

	depends on ARCH_TEGRA_3x_SOC

	help

	  This driver is for the Memory Controller(MC) module available

	  in Tegra30 SoCs, mainly for a address translation fault

	  analysis, especially for IOMMU/SMMU(System Memory Management

	  Unit) module.



config FSL_CORENET_CF

	tristate "Freescale CoreNet Error Reporting"

	depends on FSL_SOC_BOOKE
@@ -85,4 +75,6 @@ config FSL_IFC 
	bool

	depends on FSL_SOC



source "drivers/memory/tegra/Kconfig"



endif

drivers/memory/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -12,4 +12,5 @@ obj-$(CONFIG_FSL_CORENET_CF) += fsl-corenet-cf.o 
obj-$(CONFIG_FSL_IFC)		+= fsl_ifc.o

obj-$(CONFIG_MVEBU_DEVBUS)	+= mvebu-devbus.o

obj-$(CONFIG_TEGRA20_MC)	+= tegra20-mc.o

obj-$(CONFIG_TEGRA30_MC)	+= tegra30-mc.o
 


obj-$(CONFIG_TEGRA_MC)		+= tegra/

drivers/memory/tegra/Kconfig

0 → 100644
+7 −0
Original line number Diff line number Diff line 
config TEGRA_MC

	bool "NVIDIA Tegra Memory Controller support"

	default y

	depends on ARCH_TEGRA

	help

	  This driver supports the Memory Controller (MC) hardware found on

	  NVIDIA Tegra SoCs.

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